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LTP5901-IPM Datasheet(PDF) 22 Page - Linear Technology

Part # LTP5901-IPM
Description  SmartMesh IP Node 2.4GHz 802.15.4e Wireless Mote Module
PDF  36 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTP5901-IPM Datasheet(HTML) 22 Page - Linear Technology

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LTP5901-IPM/LTP5902-IPM
22
59012ipmfa
For more information www.linear.com/LTP5901-IPM or www.linear.com/LTP5902-IPM
NO IPCS SPI/FLASH PROGRAMMING (NOTE 15)
TYPE
I/O
PULL DESCRIPTION
33 IPCS_MISO
TIMER16_OUT
GPIO6
2
I
O
I/O
-
-
-
SPI Flash Emulation (MISO) Master In Slave Out Port
16-Bit Timer/Counter Match Output/PWM Output
General Purpose Digital I/O
35 IPCS_MOSI
TIMER16_EXT
GPIO5
1
I
I
I/O
-
-
-
SPI Flash Emulation (MOSI) Master Out Slave In Port
External Input to 16-Bit Timer/Counter
General Purpose Digital I/O
36 IPCS_SCK
TIMER8_EXT
GPIO4
1
I
I
I/O
-
-
-
SPI Flash Emulation (SCK) Serial Clock Port
External Input to 8-Bit Timer/Counter
General Purpose Digital I/O
39 IPCS_SSn
LPTIMER_EXT
GPIO3
1
I
I
I/O
-
-
-
SPI Flash Emulation Slave Select, Active Low
External Input to Low Power Timer/Counter
General Purpose Digital I/O
51 FLASH_P_ENn
1
I
UP
Flash Program Enable, Active Low
pin FuncTions Pin functions shown in italics are currently not supported in software.
NO I2C/1-WIRE/SPI SLAVE
TYPE
I/O
PULL DESCRIPTION
47 SPIS_MISO
UARTC1_TX
1_WIRE
2
O
O
I/O
-
-
-
SPI Slave (MISO) Master In Slave Out Port
CLI UART 1 Transmit
1 Wire Master
48 SPIS_MOSI
UARTC1_RX
GPIO26
1
I
I
I/O
-
-
-
SPI Slave (MOSI) Master Out Slave In Port
CLI UART 1 Receive
General Purpose Digital I/O
49 SPIS_SCK
SCL
2
I
I/O
-
-
SPI Slave (SCK) Serial Clock Port
I2C Serial Clock
50 SPIS_SSn
SDA
2
I
I/O
-
-
SPI Slave Select, Active Low
I2C Serial Data
NO API UART
TYPE
I/O
PULL DESCRIPTION
57 UART_RX_RTSn
1 (Note 14)
I
-
UART Receive (RTS) Request to Send, Active Low
58 UART_RX_CTSn
1
O
-
UART Receive (CTS) Clear to Send, Active Low
59 UART_RX
1 (Note 14)
I
-
UART Receive
60 UART_TX_RTSn
1
O
-
UART Transmit (RTS) Request to Send, Active Low
61 UART_TX_CTSn
1 (Note 14)
I
-
UART Transmit (CTS) Clear to Send, Active Low
62 UART_TX
2
O
-
UART Transmit
Note 14: These inputs are always enabled and must be driven or pulled to
a valid state to avoid leakage.
Note 15: Embedded programming over the IPCS SPI bus is only avaliable
when RESETn is asserted.



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