MP157 –SMALLEST ENERGY EFFICIENT OFF-LINE REGULATOR WITH EXTENDED POWER RANGE

MP157 Rev. 1.04

www.MonolithicPower.com

13

6/27/2016

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feedback comparator which is also shown in

Figure 5. The ramp compensation is related

with the load conditions. At the full load

conditions, the compensation is about the

3mV/

s. With the load decreases, the

compensation increases exponentially.

Over Load Protection (OLP)

As the load increases, the peak current and the

switching frequency both increase. When

switching frequency and peak current reaches

the maximum, output voltage decreases if the

load continues to increase. So FB voltage drops

below OLP point.

By continuously monitoring the FB voltage,

when FB voltage drops below 1.7V which is

considered as an error flag, the timer starts

counting. If the error flag removes, the timer

resets. If the timer reaches its completion when

it has counted to 150ms (Fs=37kHz), OLP

takes

place.

This

timer

duration

avoids

triggering OLP function when the power supply

is at start up or load transition phase. So power

supply should start up in less than 150ms

(Fs=37kHz). Different switching frequency (fs)

leads to different over load protection delay

time, as shown following equation:



Dealy

37kHz

T150ms

fs

Short Circuit Protection (SCP)

The MP157 monitors the peak current, and

shuts down when the peak current rises above

900mA, featuring a short circuit protection. As

soon as the fault disappears, the power supply

resumes operation.

Thermal shutdown (TSD)

To prevent from any lethal thermal damage,

MP157 shuts down switching cycle when the

inner temperature exceeds 150

C. During the

thermal shutdown (TSD), the VCC will be

discharged to 2.4V, and then be re-charged by

the internal high voltage regulator.

Open Loop Detection

If the FB voltage is lower than 60mV, IC will

stop working and a re-start cycle will begin.

During the start up, the open loop detection is

blanked for 128 switching cycles.

Leading Edge Blanking

In order to avoid the premature termination of

the switching pulse due to the parasitic

capacitance, an internal leading edge blanking

(LEB) unit is employed between the current

sense resistor inside the IC and the current

comparator input. During the blanking time, the

current comparator is disabled and can not turn

off the external MOSFET. Figure 6 shows the

leading edge blanking.

t

Figure 6: Leading Edge Blanking