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dc2060af

DEMO MANUAL DC2060A

operating principles

The LTC4229 functions as an ideal diode with inrush cur-

rent limiting and overcurrent protection by controlling two

external N-channel MOSFETs (Q2 and Q3) in a power path.

AllcomponentdesignatorsrefertotheDC2060Aschematic.

AninternalchargepumpprovidesenergyforbothMOSFET

gate drivers through their individual current sources. Each

MOSFET has an ON/OFF control: Q2 with DOFF pin signal

(JP9) and Q3 with EN pin signal (JP7).

The LTC4229 regulates the voltage between the IN pin

and the diode sense pin (DSNS), so the DSNS connec-

tion defines the power path node in which the ideal diode

regulates the voltage. There is an option (JP2) to connect

the DSNS pin to Q2 drain or to the OUT node. Selection

of this connection should be accompanied by a suitable

signal at the DCFG pin. The proper signal is reached by

placing the shunt of the jumper DC_CFG(JP8) in the

proper position.

Table 1 demonstrates possible power path topologies

for DC2060A and conditions necessary to achieve them.

The LTC4229 precision comparators are used to monitor

the input voltage for both UV and OV conditions. Enabling

the ideal diode functionality with the DOFF pin (low) forces

the ideal diode gate drive amplifier to monitor the voltage

between the IN and DSNS pins. Sensing the large forward

voltage drop, the gate drive amplifier quickly pulls up

DGATE turning the ideal diode MOSFET on.

Highpull-upcurrentoftheidealdiodeMOSFETguarantees

minimum voltage droop during supply switchover and a

short turn-on time.

Enabling the Hot Swap control with the EN pin (low)

initiates a debounce time interval, which can be fixed at

100ms, or 8.9ms to 17.5ms set by the capacitor C9 on

the DTMR pin.

The foldback current limit and electronic circuit breaker of

the Hot Swap MOSFET protect the input rail against short

circuit faults and excessive load.

After the debounce time, a 10µA current source from the

chargepumprampsuptheHGATEpin.WhentheHotSwap

MOSFET Q3 turns on, the maximum current is limited to

a level set by an external sense resistor RS1 (or RS2 in

the optional application with Q4 MOSFET).

When both MOSFETs Q2 and Q3 (or Q4 and Q5 in the

optionalapplication)areturnedon,thegatedriveamplifier

controls DGATE to servo the forward voltage drop across

the MOSFET Q2 (or both MOSFETs and sense resistor)

to 65mV. If the load current causes more than 65mV of

voltage drop, the gate voltage rises to enhance the ideal

diode MOSFET.

If the MOSFETs are conducting, and an input supply is

shorted,alargereversecurrentstartsflowingfromtheload

to the input. The gate drive amplifier detects this failure

condition as soon as it appears and turns the ideal diode

MOSFETQ2off,bypullingdowntheDGATEpin.TheHGATE

pin continues pulling high and keeps the MOSFET Q3 on.