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MAX17632 Datasheet(PDF) 21 Page - Maxim Integrated Products |
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MAX17632 Datasheet(HTML) 21 Page - Maxim Integrated Products |
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21 / 25 page ![]() Calculate resistor R7 from the FB pin to SGND as follows: ( ) OUT R6 0.9 R7 = V - 0.9 × R7 is in kΩ. Power Dissipation At a particular operating condition, the power losses that lead to temperature rise of the part are estimated as follows: ( ) 2 LOSS OUT OUT DCR 1 P = P -1 - I R ×× η OUT OUT OUT P = V x I where: POUT = Output power η = Efficiency of the converter RDCR = DC resistance of the inductor (see the Typical Operating Characteristics for more information on effi- ciency at typical operating conditions). For a typical multilayer board, the thermal performance metrics for the package are given below: θJA = 38°C/W θJC = 10°C/W The junction temperature of the device can be estimated at any given maximum ambient temperature (TA(MAX)) from the following equation: ( ) J(MAX) A(MAX) JA LOSS T = T + P θ× If the application has a thermal-management system that ensures that the exposed pad of the device is maintained at a given temperature (TEP(MAX)) by using proper heat sinks, then the junction temperature of the device can be estimated at any given maximum ambient temperature as: ( ) J(MAX) EP(MAX) JC LOSS T = T + P θ× Note: Junction temperatures greater than +125°C degrades operating lifetimes. PCB Layout Guidelines All connections carrying pulsed currents must be very short and as wide as possible. The inductance of these connections must be kept to an absolute minimum due to the high di/dt of the currents. Since inductance of a cur- rent-carrying loop is proportional to the area enclosed by the loop, if the loop area is made very small, inductance is reduced. Additionally, small-current loop areas reduce radiated EMI. A ceramic input filter capacitor should be placed close to the VIN pins of the IC. This eliminates as much trace inductance effects as possible and gives the IC a cleaner voltage supply. A bypass capacitor for the VCC pin also should be placed close to the pin to reduce effects of trace impedance. When routing the circuitry around the IC, the analog small signal ground and the power ground for switching cur- rents must be kept separate. They should be connected together at a point where switching activity is minimum. This helps keep the analog ground quiet. The ground plane should be kept continuous (unbroken) as far as possible. No trace carrying high switching current should be placed directly over any ground plane discontinuity. PCB layout also affects the thermal performance of the design. A number of thermal throughputs that connect to a large ground plane should be provided under the exposed pad of the part, for efficient heat dissipation. For a sample layout that ensures first pass success, refer to the MAX17632 evaluation kit layout available at www. maximintegrated.com. Figure 2. Setting the Output Voltage VOUT R6 R7 FB SGND www.maximintegrated.com Maxim Integrated │ 21 MAX17632 4.5V to 36V, 2A, High-Efficiency, Synchronous Step-Down DC-DC Converter |
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