LT3741 datasheet(10/32 Pages) LINER

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LT8390

8390fa

For more information www.linear.com/LT8390

PIN FUNCTIONS

BG1: Buck Side Bottom Gate Drive. Drives the gate of buck

side bottom N-channel MOSFET with a voltage swing from

ground to INTVCC.

BST1: Buck Side Bootstrap Floating Driver Supply. The

BST1 pin has an integrated bootstrap Schottky diode from

theINTVCCpinandrequiresanexternalbootstrapcapacitor

to the SW1 pin. The BST1 pin swings from a diode voltage

drop below INTVCC to (VIN + INTVCC).

SW1: Buck Side Switch Node. The SW1 pin swings from

a Schottky diode voltage drop below ground up to VIN.

TG1: Buck Side Top Gate Drive. Drives the gate of buck

side top N-channel MOSFET with a voltage swing from

SW1 to BST1.

LSP: Positive Terminal of the Buck Side Inductor Current

Sense Resistor (RSENSE). Ensure accurate current sense

with Kelvin connection.

LSN: Negative Terminal of the Buck Side Inductor Current

Sense Resistor (RSENSE). Ensure accurate current sense

with Kelvin connection.

VIN: Input Supply. The VIN pin must be tied to the power

inputtodeterminethebuck,buck-boost,orboostoperation

regions. Locally bypass this pin to ground with a minimum

1µF ceramic capacitor.

INTVCC: Internal 5V Linear Regulator Output. The INTVCC

linearregulatorissuppliedfromtheVINpin,andpowersthe

internal control circuitry and gate drivers. Locally bypass

thispintogroundwithaminimum 4.7µFceramiccapacitor.

EN/UVLO: Enable and Undervoltage Lockout. Force the pin

below 0.3V to shut down the part and reduce VIN quiescent

current below 2µA. Force the pin above 1.233V for normal

operation.Theaccurate1.220Vfallingthresholdcanbeused

to program an undervoltage lockout (UVLO) threshold with

a resistor divider from VIN to ground. An accurate 2.5µA

pull-downcurrentallowstheprogrammingofVINUVLOhys-

teresis. If neither function is used, tie this pin directly to VIN.

TEST: Factory Test. This pin is used for testing purpose

only and must be directly connected to ground for the

part to operate properly.

LOADEN: Load Switch Enable Input. The LOADEN pin is

used to control the ON/OFF of the high side PMOS load

switch. If the load switch control is not used, tie this pin

to VREF or INTVCC. Forcing the pin low turns off TG1 and

TG2, turns on BG1 and BG2, disconnects the VC pin from

all internal loads, and turns off LOADTG.

VREF: Voltage Reference Output. The VREF pin provides an

accurate 2V reference capable of supplying 1mA current.

Locally bypass this pin to ground with a 0.47µF ceramic

capacitor.

CTRL: Control Input for ISP/ISN Current Sense Threshold.

The CTRL pin is used to program the ISP/ISN current limit:

IIS(MAX) =

Min VCTRL −0.25V,1V

(

)

10 •RIS

The VCTRL can be set by an external voltage reference or

a resistor divider from VREF to ground. For 0.3V ≤ VCTRL

≤ 1.15V, the current sense threshold linearly goes up

from 5mV to 90mV. For VCTRL ≥ 1.35V, the current sense

threshold is constant at 100mV full scale value. For 1.15V

≤ VCTRL ≤ 1.35V, the current sense threshold smoothly

transitions from the linear function of VCTRL to the 100mV

constant value. Tie CTRL to VREF for the 100mV full scale

threshold. Force the pin below 0.3V to stop switching.

ISP: Positive Terminal of the ISP/ISN Current Sense Re-

sistor (RIS). Ensure accurate current sense with Kelvin

connection.

ISN: Negative Terminal of the ISP/ISN Current Sense

Resistor (RIS). Ensure accurate current sense with Kelvin

connection.

ISMON:ISP/ISNCurrentSenseMonitorOutput.TheISMON

pin generates a voltage that is equal to ten times V(ISP-ISN)

plus 0.25V offset voltage. For parallel applications, tie the

master LT8390 ISMON pin to the slave LT8390 CTRL pin.

PGOOD: Power Good Open Drain Output. The PGOOD

pin is pulled low when the FB pin is within ±10% of the

final regulation voltage. To function, the pin requires an

external pull-up resistor.

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