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LTC4303 Datasheet(PDF) 5 Page - Linear Technology

Part # LTC4303
Description  Dual I2C/SMBus Address Translator
PDF  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4303 Datasheet(HTML) 5 Page - Linear Technology

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LTC4317
5
4317fa
For more information www.linear.com/LTC4317
Typical perForMance characTerisTics
SDAOUT Fall Delay vs Bus
Capacitance
SDAOUT Fall Time vs
Temperature
SDAOUT Fall Time vs Bus
Capacitance
TA = 25°C, VCC = 3.3V unless otherwise noted.
pin FuncTions
XORL1/XORL2: Translator XOR Lower Nibble Configura-
tion Input. The DC voltage at this pin configures the lower
4-bit nibble of the address translation byte. Tie the pin to
an external resistive divider connected between VCC and
GND to set the desired DC voltage.
XORH1/XORH2: Translator XOR Upper Nibble Configura-
tion Input. The DC voltage at this pin configures the upper
3-bit nibble of the address translation byte. Tie the pin to
an external resistive divider connected between VCC and
GND to set the desired DC voltage. Connect this pin to VCC
to activate pass-through mode. See Application Informa-
tion section for more details.
ENABLE1/ENABLE2: Enable Input. If ENABLE pin is low,
the address translation is disabled, SDAIN is disconnected
from SDAOUT, and SCLIN is disconnected from SCLOUT.
A low to high transition on ENABLE restarts the configura-
tion of the address translation byte and also enables the
address translation. Connect to VCC if unused.
Exposed Pad: Exposed pad may be left open or connected
to device GND.
GND: Device Ground.
READY1/READY2: Ready Status Output. This is an open
drain output to indicate that the device is ready for address
translation. The pin releases high when the LTC4317 has
completed configuration of the address translation byte,
SDAIN is connected to SDAOUT and SCLIN is connected to
SCLOUT.Connectapull-upresistor,typically10k,fromthispin
to the bus pull-up supply. Leave open or tie to GND if unused.
SCLIN: Input Bus Clock Input and Output. Connect this
pin to the SCL line on the master side. An external pull-up
resistor or current source is required.
SCLOUT1/SCLOUT2: Output Bus Clock Input and Output.
ConnectthispintotheSCLlineontheslaveside.Anexternal
pull-up resistor or current source is required. Connect to
VCC through a pull-up resistor if unused.
SDAIN: Input Bus Data Input and Output. Connect this pin
to the SDA line on the master side. An external pull-up
resistor or current source is required.
SDAOUT1/SDAOUT2: Output Bus Data Input and Output.
Connect this pin to the SDA line on the slave side. An
external pull-up resistor or current source is required.
Connect to VCC through a pull-up resistor if unused.
VCC: Power Supply Input (2.25V to 5.5V). If the supply
voltages for the input and output buses are different, con-
nect this pin to the lower supply. If the input and output
supplies have the same nominal value and with tolerance
less than or equal to ±10%, connect VCC to either supply.
Bypass with at least 0.1µF to GND.
CBUS (pF)
0
300
250
275
150
200
175
225
125
100
200
600
400
800
4317 G07
1000
VCC = 3.3V
VCC = 5V
VCC = 2.25V
TEMPERATURE (°C)
–50
120
100
60
80
40
20
0
50
–25
25
75
4317 G08
100
C = 100pF
VCC = 5V
VCC = 2.25V
VCC = 3.3V
CBUS (pF)
0
120
100
60
80
40
20
200
600
400
800
4317 G09
1000
VCC = 5V
VCC = 2.25V
VCC = 3.3V



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