LTC4311 datasheet(3/20 Pages) LINER

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LTC4313-1/LTC4313-2/

LTC4313-3

4313123f

elecTrical characTerisTics

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Power Supply/Start-Up

VCC

Input Supply Voltage

2.9

5.5

VDD,BUS

2-Wire Bus Supply Voltage

LTC4313-1, LTC4313-2

2.9

5.5

LTC4313-3

1.4

5.5

ICC

Input Supply Current

VENABLE = VCC = 5.5V, VSDAIN,SCLIN = 0V

(Note 3)

8.1

ICC(DISABLED)

Input Supply Current

VENABLE = 0V, VCC = 5.5V,

VSDAIN,SCLIN = 0V

2.5

3.5

4.5

VTH_UVLO

VCC UVLO Threshold

VCC Rising

2.55

2.7

2.85

VCC_UVLO(HYST) UVLO Threshold Hysteresis Voltage

200

VPRE

Precharge Voltage

SDA, SCL Pins Open

0.8

1.2

Buffers

VOS(SAT)

Buffer Offset Voltage

IOL = 4mA, Driven VSDA,SCL = 50mV

100

190

280

IOL = 500µA, Driven VSDA,SCL = 50mV

120

VOS

Buffer Offset Voltage

IOL = 4mA, Driven VSDA,SCL = 200mV

120

180

IOL = 500µA, Driven VSDA,SCL = 200mV

115

VIL, FALLING

Buffer Input Logic Low Voltage

VCC = 2.9V, 3.3V, 5.5V

0.3•VCC 0.33•VCC 0.36•VCC

∆VIL(HYST)

VIL Hysteresis Voltage

ILEAK

Input Leakage Current

SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V

±10

µA

CIN

Input Capacitance

SDA, SCL Pins (Note 4)

Rise Time Accelerators (LTC4313-1 and LTC4313-2 Only)

dV/dt(RTA)

Minimum Slew Rate Requirement

SDA, SCL Pins, VCC = 5V

0.1

0.2

0.4

V/µs

VRTA(TH)

Rise Time Accelerator DC Threshold Voltage VCC = 5V

0.38 •VCC 0.41•VCC 0.44•VCC

∆VACC

Buffers Off to Accelerator On Voltage

SDA, SCL Pins, VCC = 5V

0.05•VCC 0.07•VCC

IRTA

Rise Time Accelerator Pull-Up Current

SDA, SCL Pins, VCC = 5V (Note 5)

LTC4313-1

LTC4313-2

1.5

2.5

3.5

Enable/Control

VEN(TH)

ENABLE Threshold Voltage

1.4

1.8

ILEAK

ENABLE Leakage Current

VENABLE = 5.5V

0.1

±10

µA

VREADY(OL)

READY Output Low Voltage

IREADY = 3mA, VCC = 5V

0.4

IREADY(OH)

READY Off Leakage Current

VCC = VREADY = 5V

0.1

±5

µA

Stuck Low Timeout Circuitry

tTIMEOUT

Bus Stuck Low Timer

I2C Interface Timing

fSCL(MAX)

I2C Frequency Max

400

kHz

tPDHL

SCL, SDA Fall Delay

VCC = VDD,BUS = 5V, CBUS = 100pF,

RBUS = 10kΩ (Note 4)

130

250

SCL, SDA Fall Times

VCC = VDD,BUS = 5V, CBUS = 100pF,

RBUS = 10kΩ (Note 4)

300

tIDLE

Bus Idle Time

175

µs

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V unless otherwise noted.

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into pins are positive and all voltages are referenced to

GND unless otherwise indicated.

Note 3: Test performed with SDA, SCL buffers active.

Note 4: Guaranteed by design and not tested.

Note 5: Measured in a special DC mode with VSDA,SCL = VRTA(TH) + 1V.

The transient IRTA during rising edges for the LTC4313-1 will depend on

the bus loading condition and the slew rate of the bus. The LTC4313-1’s

internal slew rate control circuitry limits the maximum bus rise rate to

75V/µs by controlling the transient IRTA.

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