XRT7295AT

13

Rev.1.20

Data

Rate

REQB

LOSTHR

Min.

Threshold

Max.

Threshold

Unit

DS3

0

0

60

220

mV pk

40

145

mV pk

25

90

mV pk

1

0

45

175

mV pk

30

115

mV pk

20

70

mV pk

STS-1

0

0

75

275

mV pk

50

185

mV pk

30

115

mV pk

1

0

55

220

mV pk

35

145

mV pk

25

90

mV pk

Notes

- Lower threshold is 1.5 dB below upper threshold.

- The RLOS alarm is an indication of the absence of an input signal, not a bit error rate indication (independent of the RLOS state). The

device will attempt to recover correct timing data. The RLOS low-to-high transition typically occurs 1dB below the high to low transi-

tion.

Table 6. Analog Loss-of-Signal Thresholds

RECOVERED CLOCK AND DATA TIMING

Table 7

and Figure 11 summarize the timing relationships

between the logic signals RCLK, RPDATA, and RNDATA.

RPDATA and RNDATA change on the rising edge of

RCLK and are valid during the falling edge of RCLK. A

a low level on RNDATA. A negative pulse at the input

creates a high level on RNDATA and a low level on

RPDATA, and a received zero produces low levels on

both RPDATA and RNDATA.

IN-CIRCUIT TEST CAPABILITY

When pulled low, the ICT pin forces all digital output

buffers (RCLK, RPDATA, RNDATA, RLOS, RLOL pins) to

be placed in a high output impedance state. This feature

allows in-circuit testing to be done on neighboring devices

without concern for XRT7295AT device buffer damage.

An internal pull-up device (nominally 50kW) is provided on

this pin therefore, users can leave this pin unconnected

for normal operation. Test equipment can pull ICT low

during in-circuit testing without damaging the device.

This is the only pin for which internal pull-up/pull-down is

provided.