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ISL58113 Datasheet(PDF) 2 Page - Renesas Technology Corp |
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ISL58113 Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 9 page ![]() ISL58113 FN7659 Rev 1.00 Page 2 of 9 July 29, 2013 Pin Configuration ISL58113 (24 LD QFN) TOP VIEW 19 18 17 16 15 14 13 1 2 3 4 5 6 7 THERMAL NC DATA DATAB GND DIS NC NC NC GND VCC IOUT VCC VCC PDIN THERMAL PAD Pin Descriptions PIN NAME PIN NUMBER I/O TYPE DESCRIPTION DATA 2 I LVDS Input data to control Laser Switching Control DATAB 3 I LVDS Input data to control Laser Switching Control GND 4, 18, 24 Ground Ground DIS 5 I Digital Disable output current NC 1, 6, 7, 19, 23 I No connect No connect CHPEN 8 I Digital Chip Enable; Pull High to Enable RPS 9 I Analog External resistor sets the Hsync detection power RBIAS 10 Analog Resistors set bias threshold current. See “Applications Information” on page 7 for more details RSET 11 O Analog Bandgap derived internal reference IVOUT 12 O Analog Calibrate channel with an external trimpot to GND Adjust the IV amplifier gain PDIN 13 I Analog Photo Diode input to the IV amplifier VCC 14, 15, 17 Power Supply Voltage IOUT 16 O Analog Laser Current Output HPSB 20 I TLL Hsync Power Select Enable; Active Low. During HPSB is low AND Hsync signal from photo detector is low, the output current is set by RPS CALB 21 I TTL Samples the laser power for APC; Active Low VC 22 I Analog Voltage Controlling Laser Switching Current; 0V to 2V input for 0% to 100% output Thermal Pad - Exposed Thermal Pad should be soldered to GND NOTE: Pins with the same name are not necessary internally connected together. LDD pins must not be used for connecting together external components or features. |
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