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UPD63335 Datasheet(PDF) 2 Page - NEC |
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UPD63335 Datasheet(HTML) 2 Page - NEC |
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2 / 13 page ![]() Philips Semiconductors PHP/PHB110NQ08LT N-channel TrenchMOS™ logic level FET Product data Rev. 01 — 29 March 2004 2 of 13 9397 750 12924 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 3. Ordering information 4. Limiting values Table 2: Ordering information Type number Package Name Description Version PHP110NQ08LT TO-220AB Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 leads SOT78 PHB110NQ08LT D2-PAK Plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT404 Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage (DC) 25 °C ≤ T j ≤ 175 °C - 75 V VDGR drain-gate voltage (DC) 25 °C ≤ Tj ≤ 175 °C; RGS =20kΩ -75 V VGS gate-source voltage (DC) - ±20 V ID drain current (DC) Tmb =25 °C; VGS =10V; Figure 2 and 3 -75 A Tmb = 100 °C; VGS =10V; Figure 2 -75 A IDM peak drain current Tmb =25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 240 A Ptot total power dissipation Tmb =25 °C; Figure 1 - 230 W Tstg storage temperature −55 175 °C Tj junction temperature −55 175 °C Source-drain diode IS source (diode forward) current (DC) Tmb =25 °C - 75 A ISM peak source (diode forward) current Tmb =25 °C; pulsed; tp ≤ 10 µs - 240 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy unclamped inductive load; ID =75A; tp = 0.15 ms; VDD ≤ 75 V; RGS =50 Ω; VGS = 10 V; starting Tj =25 °C - 560 mJ |
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