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TAS5805MPWPR Datasheet(PDF) 48 Page - Texas Instruments

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Part # TAS5805MPWPR
Description  23-W, Inductor-Less, Digital Input, Stereo, Closed-Loop Class-D Audio Amplifier with Enhanced Processing and Low Idle Power Dissipation
PDF  88 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5805MPWPR Datasheet(HTML) 48 Page - Texas Instruments

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TAS5805M
SLASEH5 – MAY 2018
www.ti.com
Product Folder Links: TAS5805M
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
9.6.1.17 DSP_PGM_MODE Register (Offset = 40h) [reset = 0x01]
DSP_PGM_MODE is shown in Figure 84 and described in Table 23.
Return to Summary Table.
Figure 84. DSP_PGM_MODE Register
7
6
5
4
3
2
1
0
RESERVED
MODE_SEL
R/W
R/W
Table 23. DSP_PGM_MODE Register Field Descriptions
Bit
Field
Type
Reset
Description
7-5
RESERVED
R/W
000
This bit is reserved
4-0
MODE_SEL
R/W
00001
DSP Program Selection
These bits select the DSP program to use for audio processing.
00000 => ram mode
00001 => rom mode 1
00010 => rom mode 2
00011 => rom mode 3
9.6.1.18 DSP_CTRL Register (Offset = 46h) [reset = 0x01]
DSP_CTRL is shown in Figure 85 and described in Table 24.
Return to Summary Table.
Figure 85. DSP_CTRL Register
7
6
5
4
3
2
1
0
RESERVED
USER_DEFINED_PROCESSING
_RATE
RESERVED
BOOT_FROM_
IRAM
USE_DEFAUL
T_COEFFS
R/W
R/W
R
R/W
R/W
Table 24. DSP_CTRL Register Field Descriptions
Bit
Field
Type
Reset
Description
7-5
RESERVED
R/W
000
This bit is reserved
4-3
USER_DEFINED_PROCE
SSING_RATE
R/W
00
00:48k, 2.1 Processing SRC disabled
10:96k ,2.0 Processing SRC enabled
01:Reserved
11:Reserved
2
RESERVED
R
0
This bit is reserved
1
BOOT_FROM_IRAM
R/W
0
DSP boots from IRAM
When set DSP will boot from IRAM instead of IROM
0: boot DSP from IROM
1: boot DSP from IRAM
0
USE_DEFAULT_COEFFS R/W
1
Use default coefficients from ZROM this bit controls whether to use
default coefficients from ZROM or use the non-default coefficients
downloaded to device by the Host
0 : don't use default coefficients from ZROM
1 : use default coefficents from ZROM
9.6.1.19 DIG_VOL_CTRL1 (Offset = 4Bh) [reset = 0h]
DIG_VOL_CTRL1 is shown in Figure 86 and described in Table 25.
Return to Summary Table.



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