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ZL8101ALAF Datasheet(PDF) 28 Page - Renesas Technology Corp

Part # ZL8101ALAF
Description  Adaptive Digital DC/DC PWM Controller with Auto Compensation
PDF  36 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZL8101ALAF Datasheet(HTML) 28 Page - Renesas Technology Corp

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ZL8101
FN7832 Rev 1.00
Page 28 of 36
July 13, 2012
Voltage Margining
The ZL8101 offers a simple means to vary its output higher or
lower than its nominal voltage setting in order to determine
whether the load device is capable of operating over its specified
supply voltage range. The MGN command is set by driving the
MGN pin or through the I2C/SMBus interface. The MGN pin is a
TTL-compatible input that is continuously monitored and can be
driven directly by a processor I/O pin or other logic-level output.
The ZL8101’s output will be forced higher than its nominal set
point when the MGN command is set HIGH, and the output will
be forced lower than its nominal set point when the MGN
command is set LOW. Default margin limits of VNOM ±5% are
pre-loaded in the factory, but the margin limits can be modified
through the I2C/SMBus interface to as high as VNOM + 10% or as
low as 0V, where VNOM is the nominal output voltage set point
determined by the V0 and V1 pins. A safety feature prevents the
user from configuring the output voltage to exceed VNOM + 10%
under any conditions.
The margin limits and the MGN command can both be set
individually through the I2C/SMBus interface. Additionally, the
transition rate between the nominal output voltage and either
margin limit can be configured through the I2C interface. Please
refer to Application Note AN2033 for detailed instructions on
modifying the margining configurations.
External Voltage Monitoring
The voltage monitoring (VMON) pin is available to monitor the
voltage supply for the external driver IC. If the voltage falls below
a predefined threshold value (adjustable through a PMBus
command), the device will fault and stop sending PWM signals. A
1/16 external resistor divider is required to keep the maximum
voltage on this pin to less than 1.15V.
I2C/SMBus Communications
The ZL8101 provides an I2C/SMBus digital interface that enables
the user to configure all aspects of the device operation as well
as monitor the input and output parameters. The ZL8101 can be
used with any standard 2-wire I2C host device. In addition, the
device is compatible with SMBus version 2.0 and includes an
SALRT line to help mitigate bandwidth limitations related to
continuous fault monitoring. Pull-up resistors are required on the
I2C/SMBus. The ZL8101 accepts most standard PMBus
commands. When controlling the device with PMBus commands,
it is recommended that the enable pin is tied to SGND.
I2C/SMBus Device Address Selection
When communicating with multiple SMBus devices using the
I2C/SMBus interface, each device must have its own unique
address so the host can distinguish between the devices. The
device address can be set according to the pin-strap options
listed in Table 17. Address values are right-justified.
TABLE 17. TRACKING MODE CONFIGURATION
RSS
(kΩ)
UVLO
(V)
TRACKING RATIO
(%)
UPPER TRACK LIMIT
RAMP-UP/RAMP-DOWN BEHAVIOR
19.6
4.5
100
Limited by target voltage
Output not allowed to decrease before PG
21.5
Output will always follow VTRK
23.7
Limited by VTRK pin voltage
Output not allowed to decrease before PG
26.1
Output will always follow VTRK
28.7
50
Limited by target voltage
Output not allowed to decrease before PG
31.6
Output will always follow VTRK
34.8
Limited by VTRK pin voltage
Output not allowed to decrease before PG
38.3
Output will always follow VTRK
42.2
10.8
100
Limited by target voltage
Output not allowed to decrease before PG
46.4
Output will always follow VTRK
51.1
Limited by VTRK pin voltage
Output not allowed to decrease before PG
56.2
Output will always follow VTRK
61.9
50
Limited by target voltage
Output not allowed to decrease before PG
68.1
Output will always follow VTRK
75
Limited by VTRK pin voltage
Output not allowed to decrease before PG
82.5
Output will always follow VTRK



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