Functional Description

The ’AC378 consists of six edge-triggered D-type flip-flops

with individual D inputs and Q inputs The Clock (CP) and

Enable (E) inputs are common to all flip-flops

When the E input is LOW new data is entered into the

register on the LOW-to-HIGH transition of the CP input

When the E input is HIGH the register will retain the present

data independent of the CP input

Truth Table

Inputs

Output

E

CP

H

L

X

No Change

L

L

HH

L

L

LL

Logic Diagram

TLF10231 – 5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays

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