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DS3628 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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DS3628 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
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2 / 4 page  Absolute Maximum Ratings (Note 1) If MilitaryAerospace specified devices are required please contact the National Semiconductor Sales OfficeDistributors for availability and specifications Supply Voltage 70V Logical ‘‘1’’ Input Voltage 70V Logical ‘‘0’’ Input Voltage b 15V Storage Temperature Range b 65 Cto a150 C Maximum Power Dissipation at 25 C Cavity Package 1667 mW Molded Package 1832 mW Lead Temperature (Soldering 10 seconds) 300 C Derate cavity package 111 mW C above 25 C derate molded package 147 mW C above 25 C Operating Conditions Min Max Units Supply voltage (VCC) 45 55 V Temperature (TA) DS1628 b 55 a 125 C DS3628 0 a 70 C Electrical Characteristics (Notes 2 3) Symbol Parameter Conditions Min Typ Max Units VIN(1) Logical ‘‘1’’ Input Voltage 20 V VIN(0) Logical ‘‘0’’ Input Voltage 08 V IIN(1) Logical ‘‘1’’ Input Current VCC e 55V VIN e 55V 01 40 m A IIN(0) Logical ‘‘0’’ Input Current VCC e 55V VIN e 55V b 180 b 400 m A VCLAMP Input Clamp Voltage VCC e 45V IIN eb18 mA b 07 b 12 V VOH Logical ‘‘1’’ Output Voltage VCC e 45V IOH eb10 mA DS1628 34 43 V (No Load) DS3628 35 43 V VOL Logical ‘‘0’’ Output Voltage VCC e 45V IOL e 10 mA DS1628 025 04 V (No Load) DS3628 025 035 V VOH Logical ‘‘1’’ Output Voltage VCC e 45V IOH eb10 mA DS1628 25 39 V (With Load) DS3628 27 39 V VOL Logical ‘‘0’’ Output Voltage VCC e 45V IOL e 20 mA DS1628DS3628 035 05 V (With Load) IID Logical ‘‘1’’ Drive Current VCC e 45V VOUT e 0V (Note 6) b 150 mA IOD Logical ‘‘0’’ Drive Current VCC e 45V VOUT e 45V (Note 6) 150 mA Hi-Z TRI-STATE Output Current VOUT e 04V to 24V DIS1 or DIS2 e 20V b 40 01 40 m A ICC Power Supply Current VCC e 55V One DIS Input e 30V 90 120 mA All Other Inputs e X Outputs at Hi-Z DIS1 DIS2 e 0V Others e 3V 70 100 mA Outputs on All Inputs e 0V Outputs Off 25 50 mA Switching Characteristics (VCC e 5V TA e 25 C) (Note 6) Symbol Parameter Conditions Min Typ Max Units tSab Storage Delay Negative Edge ( Figure 1 )CL e 50 pF 40 50 ns CL e 500 pF 65 80 tSba Storage Delay Positive Edge ( Figure 1 )CL e 50 pF 42 50 ns CL e 500 pF 65 80 tF Fall Time ( Figure 1 )CL e 50 pF 42 60 ns CL e 500 pF 19 22 tR Rise Time ( Figure 1 )CL e 50 pF 52 70 ns CL e 500 pF 20 24 tZL Delay from Disable Input to Logical ‘‘0’’ CL e 50 pF RL e 2kX to VCC 19 25 ns Level (from High Impedance State) to GND ( Figure 2 ) tZH Delay from Disable Input to Logical ‘‘1’’ CL e 50 pF RL e 2kX to GND 13 20 ns Level (from High Impedance State) to GND ( Figure 2 ) 2 |
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