INTEGRAL

PARAMETER

SYMBOL MIN.

TYP.

MAX.

UNIT

Supply

Supply voltage

Vp

1,6

-

6,0

V

Total quiescent current

Itot

-

3,2

4

mA

Bridge-tied load application (BTL); see Fig.4

Output power; note 1

Vp = 3,0 V; diet = 10%

-

140

-

mW

-

150

-

mW

Voltage gain

-

32

-

dB

Noise output voltage (r.m.s. value)

Vno(rms)

-

140

-

mV

Vno(rms)

-

tbf

-

mV

D.C. output offset voltage (at Rs = 5 k

Ω)

l

∆VI

-

-

70

mV

Input impedance (at Rs =

∞)

IZiI

1

-

-

M

Ω

Input bias current

Ii

-

40

-

nA

Stereo application;

Output power; note 1

Vp=3,OV;dtot=10%

-

35

-

mW

Vp=4,5V;dtot=10%

-

75

-

mW

Voltage gain

24.5

26

27.5

dB

Noise output voltage (r.m.s. value)

Ω; f = 1 kHz

Vno(rms)

-

100

-

mV

Ω; f = 500 kHz; B =5 kHz

Vno(rms)

-

tbf

-

mV

Channel separation

Ω; f = 1 kHz

K

30

40

-

dB

Input impedance (at Rs =

∞)

IZjl

2

-

-

M

Ω

Input bias current

Ii

-

20

-

nA

Note

1. Output power is measured directly at the output pins of the IC. It is shown as a function of the supply voltage in Fig.2

(BTL application) and Fig.3 (stereo application).

Àpplication diagram (BTL)

Àpplication diagram (stereo)