LTC2904/LTC2905

7

sn29045 29045fs

V2 (Pin 1/Pin 4): Voltage Input 2. Input for V2 monitor.

Select from 3.3V, 2.5V, 1.8V, 1.5V, 1.2V or 1.0V. Refer to

Table 1 for details. The greater of V1, V2 is also the internal

(or greater) capacitor.

RST (Pin 2/Pin 3): (LTC2904 Only) Reset Logic Output.

When all voltage inputs are above the reset threshold for

at least the programmed delay time, this pin pulls low. This

using an external pull-up.

TMR (Pin 2/Pin 3): (LTC2905 Only) Reset Delay Time

GND to set a reset delay time of 9ms/nF. Leaving the pin

open generates a minimum delay of approximately 200µs.

A 22nF capacitor will generate a 200ms reset delay time.

RST (Pin 3/Pin 2): Inverted Reset Logic Output. Pulls low

when any voltage input is below the reset threshold and is

held low for programmed delay time after all voltage

inputs are above threshold. This pin has a weak pull-up

pull-up.

GND (Pin 4/Pin 1, Pin 9): Ground.

TOL (Pin 5/Pin 8): Three-state Input for Supply Tolerance

Selection (5%, 7.5% or 10%). See the Applications Infor-

mation section for tolerance selection chart (Table 2).

S1 (Pin 6/Pin 7): Voltage Threshold Select Three-State

Input. Connect to V1, GND or leave unconnected in open

state (See Table 1).

S2 (Pin 7/Pin 6): The Second Voltage Threshold Select

Three-State Input. Connect to V1, GND or leave uncon-

nected in open state (See Table 1).

V1 (Pin 8/Pin 5): Voltage Input 1. Input for V1 monitor.

Select from 5V, 3.3V, or 2.5V. See Table 1 for details. The

Bypass this pin to ground with a 0.1µF (or greater)

capacitor.

200ms

RESET PULSE

GENERATOR

THREE-STATE DECODER

RESISTOR

NETWORK

POWER

DETECT

BAND GAP

REFERENCE

LTC2904

2904 BD

S1

TOL

S2

RST

RST

GND

V1

V2

6µA

6µA

BLOCK DIAGRA