©1997 NSC

1

http://www.national.com

FPD63310

Universal Interface XGA Panel Timing Controller (UI-XPAT)

Reduced Swing Differential Signaling (

RSDS )

General Description

The FPD63310 is the first TFT-LCD timing controller that

combines at TTL single pixel system interface with Nation-

al’s Reduced Swing Differential Signaling (RSDS) source

driver interface. It resides on the TFT-LCD panel and pro-

vides the data buffering and control signal generation for

XGA and SVGA TFT-LCD panels.

The RSDS path to the source or column drivers contributes

toward lowing radiated EMI, reducing system power con-

sumption and eliminates one of the pixel busses used in typ-

ical XGA TFT-LCD panels today.

This single 9-bit differential bus conveys the 18-bit color data

for XGA panels at 130Mb/s when using VESA 60Hz stand-

ard timing.

With the addition of a single National DS90CF364 or 564

duced EMI, power consumption and width..

Feature

driver bus for low power and reduced EMI

at 130Mb/s with a 65 MHz clock

development and production environments.

width of Source PCB

s

System Diagram

Gray scale

Reference

FPD63310

XGA Panel

Timing

Controller

NM93CSxxL

Serial EEPROM

Panel Power

Supply

/2 Link1

/2 Link2

/2 Link3

/2 LinkC

LMC7532

LMC7532

LMC7532

LMC7532

1024 X 768 or 800 X 600

TFT-LCD Array

VDD

VSS

Start Pulse

Start Pulse

Inversion

Control

/9 + CLK, RSDS BUS

Line Transfer Signal

Gray Scale Voltage Reference BUS

A1

An

E1

En

*: Row Driver; LM7403(National Semiconductor)

TMS57600, 1, 4(Texas Instrument)

uPD16650, 2, 4(NEC)

ADVANCED INFORMATION

NOV, 1997