SCF5250EC datasheet(21/56 Pages) NXP

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SCF5250 Data Sheet: Technical Data, Rev. 1.3

Freescale Semiconductor

3.20.2

Clock Input

SCF5250 includes an on-chip crystal oscillator. The crystal should be connected between CRIN and

CROUT. An externally generated clock signal can also be used and should be connected directly to the

CRIN pin.

3.21

Wake-Up Signal

To exit power down mode, apply a LOW level to the WAKE_UP/GPIO21 input pin.

3.22

On-Chip Linear Regulator

The SCF5250 includes an on-chip linear regulator. This regulator provides an 1.2 V output which is

intended to be used to power the SCF5250 core. Three pins are associated with this function.

LININ, LINOUT and LINGND. Typically LININ would be fed by the I/O (PAD) supply (3.3 V) with

separate filtering recommended to provide some isolation between the I/O and the core.

In portable solutions this linear regulator may not be efficient enough and in this case we would expect the

1.2 V supply to be generated externally, possibly by a highly efficient DC-DC convertor.

If not used leave pins not connected.

Electrical Characteristics

Table 14 through Table 19 provide the electrical characteristics for the SCF5250 processor. The remaining

figures and tables in this section provide the timing diagrams and the timing parameters for the SCF5250

processor.

Table 13. Quick Reference for Electrical Characteristics

For

See

Maximum Ratings

Table 14 on page 22

Operating Temperature

Table 15 on page 22

Recommended

Operating Supply

Voltages

Table 16 on page 22

Linear Regulator

Operating Specification

Table 17 on page 23

DC Electrical

Specifications

Table 18 on page 23

Operating Parameters

for ADC DC Electrical

Characteristics

Table 19 on page 24

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