© 2003 Fairchild Semiconductor Corporation

DS500589

www.fairchildsemi.com

June 2001

Revised August 2003

FIN1047

3.3V LVDS 4-Bit Flow-Through

High Speed Differential Driver

General Description

This quad driver is designed for high speed interconnects

utilizing Low Voltage Differential Signaling (LVDS) technol-

ogy. The driver translates LVTTL signal levels to LVDS lev-

els with a typical differential output swing of 350mV which

provides low EMI at ultra low power dissipation even at

high frequencies. This device is ideal for high speed trans-

fer of clock and data.

The FIN1047 can be paired with its companion receiver,

the FIN1048, or any other LVDS receiver.

Features

■ Greater than 400Mbs data rate

■ Flow-through pinout simplifies PCB layout

■ 3.3V power supply operation

■ 0.4 ns maximum differential pulse skew

■ 1.7 ns maximum propagation delay

■ Low power dissipation

■ Power-Off protection

■ Meets or exceeds the TIA/EIA-644 LVDS standard

■ Pin compatible with equivalent RS-422 and LVPECL

devices

■ 16-Lead SOIC and TSSOP packages save space

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Truth Table

H

= HIGH Logic Level L = LOW Logic Level

X

= Don’t Care

Z

= High Impedance

Pin Descriptions

Order Number

Package Number

Package Description

FIN1047M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

FIN1047MTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Inputs

Outputs

EN

EN

H

L or OPEN

H

H

L

H

L or OPEN

L

L

H

H

L or OPEN

OPEN

L

H

XHX

Z

Z

L or OPEN

X

X

Z

Z

Pin Name

Description

LVTTL Data Inputs

Driver Outputs

Driver Outputs

EN

Driver Enable Pin

EN

Inverting Driver

Enable Pin

Power Supply

GND

Ground