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WM8860 Datasheet(PDF) 13 Page - Cirrus Logic |
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WM8860 Datasheet(HTML) 13 Page - Cirrus Logic |
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13 / 188 page ![]() WM8860 Rev 4.0 13 Test Conditions AVDD = CPVDD = 5V, DBVDD = 3.3V, DCVDD = 1.8V, TA = +25 oC, 1kHz signal, fs = 48kHz, 24-bit data unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Analogue Input 2 (VIN2LP, VIN2LN, VIN2RP, VIN2RN) Maximum Differential Input Signal Level VINDIFF(max) 0dB gain - + 0dB VIN2LN or VIN2RN VIN2LP or VIN2RP To ADC2 - + 0dB 2.25 x AVDD/5 VRMS Maximum Single-ended Input Signal Level VINSE(max) 0dB gain - + 0dB VIN2LN or VIN2RN VIN2LP or VIN2RP To ADC2 - + 0dB 1.1 x AVDD/5 VRMS Input impedance ZIN Single- ended or Differential (Inverting) - + VIN2LN or VIN2RN VIN2LP or VIN2RP ZIN ZIN 0dB to +30dB 10 k Ω Differential (Non- inverting) - + VIN2LN or VIN2RN VIN2LP or VIN2RP ZIN ZIN 0dB to +30dB 120 k Ω Common Mode Rejection Ratio CMRR 20Hz to 20kHz - + 0dB VIN2LN or VIN2RN VIN2LP or VIN2RP To ADC2 - + 0dB 65 dB Microphone Preamp Gain Options 0 10 20 30 dB Minimum PGA Gain Setting -12 dB Maximum PGA Gain Setting +12 dB PGA Gain Step Size Guaranteed monotonic 0.5 dB |
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