LOW SKEW, 1-TO-4 LVCMOS/LVTTL

FANOUT BUFFER

8304 DATA SHEET

2

REVISION H 11/19/15

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

C

IN

Input Capacitance

4

pF

C

PD

Power Dissipation Capacitance

(per output)

V

DD

, V

DDO

= 3.465V

15

pF

R

PULLDOWN

Input Pulldown Resistor

51

k

Ω

R

OUT

Output Impedance

5

7

12

Ω

Number

Name

Type

Description

1V

DDO

Power

Output supply pin.

2V

DD

Power

Positive supply pin.

3

CLK

Input

Pulldown LVCMOS / LVTTL clock input.

4

GND

Power

Power supply ground.

5

Q0

Output

Single clock output. LVCMOS / LVTTL interface levels.

6

Q1

Output

Single clock output. LVCMOS / LVTTL interface levels.

7

Q2

Output

Single clock output. LVCMOS / LVTTL interface levels.

8

Q3

Output

Single clock output. LVCMOS / LVTTL interface levels.

NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.