MMPF0100Z datasheet(79/128 Pages) NXP

79 / 128 page

NXP Semiconductors

PF0100Z

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

Table 96. Register VGEN3CTL - ADDR 0x6E

Name

Bit #

R/W

Default

Description

VGEN3

3:0

R/W

0x80

Sets VGEN3 output voltage.

See Table 92 for all possible configurations.

VGEN3EN

–

0x00

Enables or disables VGEN3 output

0 = OFF

1 = ON

VGEN3STBY

R/W

0x00

Set VGEN3 output state when in standby. Refer

to Table 93.

VGEN3LPWR

R/W

0x00

Enable low-power mode for VGEN3. Refer to

Table 93.

UNUSED

–

0x00

unused

Table 97. Register VGEN4CTL - ADDR 0x6F

Name

Bit #

R/W

Default

Description

VGEN4

3:0

R/W

0x80

Sets VGEN4 output voltage.

See Table 92 for all possible configurations.

VGEN4EN

–

0x00

Enables or disables VGEN4 output

0 = OFF

1 = ON

VGEN4STBY

R/W

0x00

Set VGEN4 output state when in standby. Refer

to Table 93.

VGEN4LPWR

R/W

0x00

Enable low-power mode for VGEN4. Refer to

Table 93.

UNUSED

–

0x00

unused

Table 98. Register VGEN5CTL - ADDR 0x70

Name

Bit #

R/W

Default

Description

VGEN5

3:0

R/W

0x80

Sets VGEN5 output voltage.

See Table 92 for all possible configurations.

VGEN5EN

–

0x00

Enables or disables VGEN5 output

0 = OFF

1 = ON

VGEN5STBY

R/W

0x00

Set VGEN5 output state when in standby. Refer

to Table 93.

VGEN5LPWR

R/W

0x00

Enable low-power mode for VGEN5. Refer to

Table 93.

UNUSED

–

0x00

unused

MMPF0100Z Datasheet(PDF) 79 Page - NXP Semiconductors

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