HT46C63 datasheet(19/44 Pages) HOLTEK

19 / 44 page

HT46R63/HT46C63

Rev. 1.90

May 17, 2004

and then write the results back to the latches or the ac-

cumulator.

Each line of port A has the capability of waking-up the

device. The pull-high resistor of each I/O line is decided

by options.

Comparator

There is a comparator implemented in this

microcontroller. This comparator can be enabled/dis-

abled by options. Its inputs are CMPP(+) and CMPN(-)

and outputs are CMPO and CHGO. When the CMPN in-

put level is less than the level of CMPP, the CMPO out-

put is VDD. When the CMPN input level is higher than the

level of CMPP, the CMPO output is VSS.

The CHGO signal is combined with CMPO and

32768Hz carrier if 32768Hz RTC oscillator is applied.

This comparator also can be disabled by options. When

the system enters halt mode, the comparator is disabled

to reduce power consumption. Once the comparator is

disabled, the CHGO and CMPO will stay at VSS level.

LCD Display Memory

The micro-controller provides an area of embedded

data memory for LCD driver. This area is located from

40H to 53H of he RAM Bank 1. Bank pointer (BP; lo-

cated at 04H of the RAM) is the switch between the gen-

eral purpose RAM and the LCD display memory. When

the BP is set to

²1², any data written into 40H~53H (indi-

rect accessing by using the MP1and R1) will effect the

LCD display. When the BP is cleared to

²0², any data

written into 40H to 53H will access the general purpose

data memory. The LCD display memory can be read

and written to only by indirect addressing mode using

MP1. When data is written into the display data area it is

automatically read by the LCD driver which then gener-

ates the corresponding LCD driving signals. To turn the

display on or off, an

²1² or a ²0² is written to the corre-

sponding bit of the display memory, respectively. The

figure illustrates the mapping between the display mem-

ory and LCD pattern for the micro-controller.

LCD Driver Output and Bias Circuit

The output number of the micro-controller LCD driver

can be 20

´3or19´4 by options (ie., 1/3 duty or 1/4

duty). The bias type of LCD driver is

²R² type, no exter-

nal capacitor is required. The LCD can be optioned as

²LCD on at HALT² or ²LCD off at HALT² which are de-

pendent on options.

The SEG7~SEG18 also can be optioned as logical out-

puts. Each group of SEG7~SEG10, SEG11~SEG14

and SEG15~SEG18 can be optioned individually. Once

an LCD segment is optioned as a logical output, the con-

tents of bit 0 of the related segment address in LCD

RAM will appear on the segment.

Memory

Segment Output

Bit 0=0

Bit 0=1

VSS

VDD

Logical Output Function

4 0 H

C O M

S E G M E N T

4 1 H

4 2 H

4 3 H

5 1 H

5 2 H

5 3 H

B i t

1 5

1 6

1 7

A d d r

4 F H

5 0 H

1 8

1 9

Display Memory

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