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STP62NS04Z Datasheet(PDF) 1 Page - STMicroelectronics |
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STP62NS04Z Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 8 page ![]() 1/8 March 2004 . STP62NS04Z N-CHANNEL CLAMPED 12.5m Ω - 62A TO-220 FULLY PROTECTED MESH OVERLAY™ MOSFET INTERNAL SCHEMATIC DIAGRAM ■ TYPICAL RDS(on) = 0.0125 Ω ■ 100% AVALANCHE TESTED ■ LOW CAPACITANCE AND GATE CHARGE ■ 175 oC MAXIMUM JUNCTION TEMPERATURE DESCRIPTION This fully clamped Mosfet is produced by using the latest advanced Company’s Mesh Overlay process which is based on a novel strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encountered in the automotive environment. Any other application requiring extra ruggedness is also recommended. APPLICATIONS ■ ABS, SOLENOID DRIVERS ■ POWER TOOLS Ordering Information TYPE VDSS RDS(on) ID STP62NS04Z CLAMPED <0.015 Ω 62 A SALES TYPE MARKING PACKAGE PACKAGING STP62NS04Z P62NS04Z TO-220 TUBE 1 2 3 TO-220 ABSOLUTE MAXIMUM RATINGS ( •) Pulse width limited by safe operating area. (1) ISD ≤40A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting Tj = 25 oC, ID = 20A, VDD= 20V Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) CLAMPED V VDG Drain-gate Voltage CLAMPED V VGS Gate- source Voltage CLAMPED V ID Drain Current (continuous) at TC = 25°C 62 A ID Drain Current (continuous) at TC = 100°C 37.5 A IDG Drain Gate Current (continuous) ± 50 mA IGS Gate SourceCurrent (continuous) ± 50 mA IDM( •) Drain Current (pulsed) 248 A Ptot Total Dissipation at TC = 25°C 110 W Derating Factor 0.74 W/°C dv/dt (1) Peak Diode Recovery voltage slope 8 V/ns EAS (2) Single Pulse Avalanche Energy 500 mJ VESD ESD (HBM - C = 100pF, R=1.5 k Ω)8 kV Tstg Storage Temperature -55 to 175 °C Tj Operating Junction Temperature |
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