TM8713

tenx technology, inc.

Rev.1.4

2001/9/4

4

PIN DESCRIPTION

Name

I/O

Description

BAK

P

Power Back-up pin(+).

. At Li Mode, connect a 0.1u capacitor to GND.

VDD1,2,3

P

LCD supply voltage and positive supply pins.

. In Ag power mode, connect positive power to VDD1.

. In Li or ExtV power mode, connect positive power to VDD2.

RESET

I

Input pin for external reset request signal, built-in internal pull-down resistor.

. Reset cycle time can be defined as “PH15/2” or “PH12/2” by mask option.

. Reset Type can be defined as “Level reset” or “Pulse reset” by mask option.

INT

I

Input pin for external interrupt request signal.

. Falling edge or rising edge triggered is defined by mask option.

. Internal pull-down or pull-up resistor is defined by mask option.

TESTA

I

Test signal input pin.

CUP1,2

O

Switching pins for supply the LCD driving voltage to the VDD1,2,3 pins.

. Connect the CUP1 and CUP2 pins with non-polarized electrolytic capacitor when chip

operated in 1/2 or 1/3 bias mode.

. In no BIAS mode application, leave these pins opened

XIN

XOUT

I

O

Time base counter frequency (clock specified. LCD alternating frequency. Alarm signal

frequency) or system clock oscillation.

. 32KHz Crystal oscillator.

. In FAST ONLY mode option, connect an external resistor could compose a RC

oscillator.

COM1~5

O

Output pins for driving the common pins of the LCD or LED panel.

SEG1-12,21-

35

O

Output pins for driving the LCD or LED panel segment.

IOA1-4

I/O

Input / Output port A.

IOB1-4

I/O

Input / Output port B.

IOC1-4

I/O

Input / Output port C.

ELC/ELP

O

Output port for EL driver.

BZB/BZ

O

Output port for alarm, clock or single tone melody generator

K1~16

O

Output port for key matrix scanning.(Shared with SEG1~SEG16)

KI1~4

I

Input port for key matrix.

GND

P

Negative supply voltage.