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CBT3244AD Datasheet(PDF) 4 Page - NXP Semiconductors |
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CBT3244AD Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 10 page ![]() Philips Semiconductors Product data sheet CBT3244A Octal bus switch with quad output enables 2004 May 26 4 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = –40 °C to +85 °C UNIT Min Typ1 Max VIK Input clamp voltage VCC = 4.5 V; II = –18 mA — — –1.2 V II Input leakage current VCC = 5.5 V; VI = GND or 5.5 V — — ±1 µA ICC Quiescent supply current VCC = 5.5 V; IO = 0, VI = VCC or GND — 1 3 µA ∆ICC Additional supply current per input pin2 VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND — — 2.5 mA CI Control pins input capacitance VI= 3 V or 0 V, OE = VCC — 3 — pF CIO(OFF) Input/output capacitance OE = VCC = 5.0 V — 3 — pF 3 VCC = 4.5 V; VI = 0 V; II = 64 mA — 4 7 ron3 On-resistance VCC = 4.5 V; VI = 0 V; II = 30 mA — 4 7 Ω VCC = 4.5 V; VI = 2.4 V; II = 15 mA — 8 15 NOTES: 1. All typical values are at VCC = 5 V, Tamb = 25 °C 2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals. AC CHARACTERISTICS GND = 0 V; tR; CL = 50 pF LIMITS SYMBOL PARAMETER FROM (INPUT) TO (OUTPUT) Tamb = –40 °C to +85 °C VCC = +5.0 V ± 0.5 V UNIT Min Max tpd Propagation delay1 A or B B or A — .25 ns ten Output enable time to HIGH and LOW level OE A or B 1.0 5.6 ns tdis Output disable time from HIGH and LOW level OE A or B 1.0 6.0 ns NOTE: 1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance). |
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