LTC2412IGN datasheet(23/36 Pages) LINER

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LTC2412

2412f

APPLICATIO S I FOR ATIO

Parallel termination near the LTC2412 pin will eliminate

this problem but will increase the driver power dissipation.

A series resistor between 27

Ω and 56Ω placed near the

driver or near the LTC2412 pin will also eliminate this

problem without additional power dissipation. The actual

resistor value depends upon the trace impedance and

connection topology.

An alternate solution is to reduce the edge rate of the

control signals. It should be noted that using very slow

edges will increase the converter power supply current

during the transition time. The multiple ground pins used

in this package configuration, as well as the differential

input and reference architecture, reduce substantially the

converter’s sensitivity to ground currents.

Particular attention must be given to the connection of the

FO signal when the LTC2412 is used with an external

conversion clock. This clock is active during the conver-

sion time and the normal mode rejection provided by the

internal digital filter is not very high at this frequency. A

normal mode signal of this frequency at the converter

reference terminals may result into DC gain and INL

errors. A normal mode signal of this frequency at the

converter input terminals may result into a DC offset error.

Such perturbations may occur due to asymmetric capaci-

tive coupling between the FO signal trace and the converter

input and/or reference connection traces. An immediate

solution is to maintain maximum possible separation

between the FO signal trace and the input/reference sig-

nals. When the FO signal is parallel terminated near the

converter, substantial AC current is flowing in the loop

formed by the FO connection trace, the termination and the

ground return path. Thus, perturbation signals may be

inductively coupled into the converter input and/or refer-

ence. In this situation, the user must reduce to a minimum

the loop area for the FO signal as well as the loop area for

the differential input and reference connections.

Driving the Input and Reference

The input and reference pins of the LTC2412 converter are

directly connected to a network of sampling capacitors.

Depending upon the relation between the differential input

voltage and the differential reference voltage, these ca-

pacitors are switching between these four pins transfering

small amounts of charge in the process. A simplified

equivalent circuit is shown in Figure 11, where IN+ and IN–

refer to the selected differential channel and the unselected

channel is omitted for simplicity.

VREF+

VIN+

VCC

RSW (TYP)

20k

ILEAK

VCC

ILEAK

VCC

RSW (TYP)

20k

CEQ

18pF

(TYP)

RSW (TYP)

20k

ILEAK

IIN+

VIN–

IIN–

IREF+

IREF–

2412 F11

ILEAK

VCC

ILEAK

SWITCHING FREQUENCY

fSW = 76800Hz INTERNAL OSCILLATOR (FO = LOW OR HIGH)

fSW = 0.5 • fEOSC EXTERNAL OSCILLATOR

VREF–

RSW (TYP)

20k

IIN

I REF

where

AVG

INCM

REFCM

AVG

INCM

REFCM

AVG

REF

INCM

REFCM

REF

AVG

REF

INCM

REFCM

REF

−

() = +−

•

() = −+

−

•

() = •−

•

−

•

() = −• −

•

REF

VIN

INTERNAL OSCILLATOR

Hz Notch F

LOW

INTERNAL OSCILLATOR

Hz Notch F

HIGH

EXTERNAL OSCILLATOR

REF

REFCM

INCM

EOSC

=−









=−

−









()

=•

()

+−

361

432

0 555 1012

Ω

Figure 11. LTC2412 Equivalent Analog Input Circuit

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