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IXTH48N15 Datasheet(PDF) 1 Page - IXYS Corporation |
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IXTH48N15 Datasheet(HTML) 1 Page - IXYS Corporation |
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1 / 2 page  © 2002 IXYS All rights reserved Symbol Test Conditions Maximum Ratings V DSS T J = 25 °C to 150°C 150 V V DGR T J = 25 °C to 150°C; R GS = 1 MΩ 150 V V GS Continuous ±20 V V GSM Transient ±30 V I D25 T C = 25°C48 A I DM T C = 25°C, pulse width limited by TJM 192 A I AR T C = 25°C48 A E AR T C = 25°C30 mJ E AS T C = 25°C 1.0 J dv/dt I S ≤ I DM, di/dt ≤ 100 A/µs, VDD ≤ VDSS, 5 V/ns T J ≤ 150°C, R G = 2 Ω P D T C = 25°C 180 W T J -55 ... +150 °C T JM 150 °C T stg -55 ... +150 °C T L 1.6 mm (0.062 in.) from case for 10 s 300 °C M d Mounting torque 1.13/10 Nm/lb.in. Weight TO-247 AD 6 g TO-268 4 g TO-247 AD (IXTH) G = Gate D = Drain S = Source TAB = Drain (TAB) 98926-A (10/02) Symbol Test Conditions Characteristic Values (T J = 25°C, unless otherwise specified) Min. Typ. Max. V DSS V GS = 0 V, I D = 250 µA 150 V V GS(th) V DS = VGS, ID = 250µA 2.0 4.0 V I GSS V GS = ±20 V DC, VDS = 0 ±100 nA I DSS V DS = V DSS T J = 25 °C25 µA V GS = 0 V T J = 125°C 250 µA R DS(on) V GS = 10 V, ID = 0.5 ID25 32 m Ω Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 % TO-268 (IXTT) Case Style (TAB) G S High Current Power MOSFET IXTH 48N15 V DSS = 150 V IXTT 48N15 I D25 = 48 A R DS(on) = 32 m Ω Ω Ω Ω Ω Advance Technical Information N-Channel Enhancement Mode Features q International standard packages q Low R DS (on) HDMOS TM process q Rugged polysilicon gate cell structure q Unclamped Inductive Switching (UIS) rated q Low package inductance - easy to drive and to protect Advantages q Easy to mount q Space savings q High power density |
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