| Electronic Components Datasheet Search |
|
AD5752RBREZ Datasheet(PDF) 5 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD5752RBREZ Datasheet(HTML) 5 Page - Analog Devices |
|
5 / 32 page ![]() Data Sheet AD5722R/AD5732R/AD5752R Rev. F | Page 5 of 32 AC PERFORMANCE CHARACTERISTICS AVDD = 4.5 V1 to 16.5 V; AVSS = −4.5 V to −16.5 V, or AVSS = 0 V; GND = 0 V; REFIN = 2.5 V external; DVCC = 2.7 V to 5.5 V; RLOAD = 2 kΩ; CLOAD = 200 pF; all specifications TMIN to TMAX unless otherwise noted. Table 3. B Version Parameter2 Min Typ Max Unit Test Conditions/Comments DYNAMIC PERFORMANCE Output Voltage Settling Time 10 12 µs 20 V step to ±0.03% FSR 7.5 8.5 µs 10 V step to ±0.03% FSR 5 µs 512 LSB step settling (16-bit resolution) Slew Rate 3.5 V/µs Digital-to-Analog Glitch Energy 13 nV-sec Glitch Impulse Peak Amplitude 35 mV Digital Crosstalk 10 nV-sec DAC-to-DAC Crosstalk 10 nV-sec Digital Feedthrough 0.6 nV-sec Output Noise 0.1 Hz to 10 Hz Bandwidth 15 µV p-p 0x8000 DAC code 100 kHz Bandwidth 80 µV rms Output Noise Spectral Density 320 nV/√Hz Measured at 10 kHz, 0x8000 DAC code 1 For specified performance, the headroom requirement is 0.9 V. 2 Guaranteed by design and characterization; not production tested. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |