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IDT7204 Datasheet(PDF) 5 Page - Integrated Device Technology

Part # IDT7204
Description  CMOS ASYNCHRONOUS FIFO
PDF  14 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7204 Datasheet(HTML) 5 Page - Integrated Device Technology

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COMMERCIAL,INDUSTRIALANDMILITARY
TEMPERATURERANGES
IDT7203/7204/7205/7206/7207/7208 CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 and 65,536 x 9
AC ELECT RI CAL CH ARACT ERI ST I CS(1) (CON T I N U ED)
(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Industrial: VCC = 5V ± 10%, TA = –40°C to +85°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C)
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Pulse widths less than minimum are not allowed.
3. Values guaranteed by design, not currently tested.
4. Only applies to read data flow-through mode.
Military
Commercial
Military
Commercial
IDT7203L30
IDT7203L35
IDT7203L40
IDT7203L50
IDT7204L30
IDT7204L35
IDT7204L50
IDT7205L30
IDT7205L35
IDT7205L50
IDT7206L30
IDT7206L35
IDT7206L50
IDT7207L30
IDT7207L35
IDT7207L50
IDT7208L35
Symbol
Parameters
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
fS
ShiftFrequency
—
25
—
22.22
—
20
—
15
MHz
tRC
Read Cycle Time
40
—
45
—
50
—
65
—
ns
tA
Access Time
—
30
—
35
—
40
—
50
ns
tRR
Read Recovery Time
10
—
10
—
10
—
15
—
ns
tRPW
Read Pulse Width(2)
30
—
35
—
40
—
50
—
ns
tRLZ
Read LOW to Data Bus LOW(3)
5—
5
—
5—
10
—
ns
tWLZ
Write HIGH to Data Bus Low-Z(3,4)
5
—
10
—
10
—
15
—
ns
tDV
Data Valid from Read HIGH
5
—
5
—
5
—
5
—
ns
tRHZ
Read HIGH to Data Bus High-Z(3)
—20
—
20
—25
—30
ns
tWC
Write Cycle Time
40
—
45
—
50
—
65
—
ns
tWPW
Write Pulse Width(2)
30
—
35
—
40
—
50
—
ns
tWR
Write Recovery Time
10
—
10
—
10
—
15
—
ns
tDS
DataSet-upTime
18
—
18
—
20
—
30
—
ns
tDH
Data Hold Time
0
—
0
—
0
—
5
—
ns
tRSC
Reset Cycle Time
40
—
45
—
50
—
65
—
ns
tRS
Reset Pulse Width(2)
30
—
35
—
40
—
50
—
ns
tRSS
ResetSet-upTime(3)
30
—
35
—
40
—
50
—
ns
tRTR
Reset Recovery Time
10
—
10
—
10
—
15
—
ns
tRTC
Retransmit Cycle Time
40
—
45
—
50
—
65
—
ns
tRT
RetransmitPulseWidth(2)
30
—
35
—
40
—
50
—
ns
tRTS
RetransmitSet-upTime(3)
30
—
35
—
40
—
50
—
ns
tRTR
Retransmit Recovery Time
10
—
10
—
10
—
15
—
ns
tEFL
Reset to EF LOW
—40
—
45
—50
—65
ns
tHFH, tFFH Reset to HF and FF HIGH
—
40
—
45
—
50
—
65
ns
tRTF
Retransmit LOW to Flags Valid
—
40
—
45
—
50
—
65
ns
tREF
Read LOW to EF LOW
—30
—
30
—35
—45
ns
tRFF
Read HIGH to FF HIGH
—
30
—
30
—
35
—
45
ns
tRPE
Read Pulse Width after EF HIGH
30
—
35
—
40
—
50
—
ns
tWEF
Write HIGH to EF HIGH
—
30
—
30
—
35
—
45
ns
tWFF
Write LOW to FF LOW
—30
—
30
—35
—45
ns
tWHF
Write LOW to HF Flag LOW
—
40
—
45
—
50
—
65
ns
tRHF
Read HIGH to HF Flag HIGH
—
40
—
45
—
50
—
65
ns
tWPF
Write Pulse Width after FF HIGH
30
—
35
—
40
—
50
—
ns
tXOL
Read/Write LOW to XO LOW
—30
—
35
—40
—50
ns
tXOH
Read/Write HIGH to XO HIGH
—
30
—
35
—
40
—
50
ns
tXI
XI Pulse Width(2)
30
—
35
—
40
—
50
—
ns
tXIR
XI Recovery Time
10
—
10
—
10
—
10
—
ns
tXIS
XISet-up Time
10
—
15
—
15
—
15
—
ns



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