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LTC4216IDE Datasheet(PDF) 16 Page - Linear Technology

Part # LTC4216IDE
Description  Ultralow Voltage Hot Swap Controller
PDF  24 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4216IDE Datasheet(HTML) 16 Page - Linear Technology

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LTC4216
4216f
16
Power-Up into an Output-Short
Figure 10 shows the timing diagram in the case when the
output is a dead short during power-up. As GATE ramps
up at time point 6, the MOSFET current increases due to
the output short causing the voltage drop across the sense
resistor to rise above 25mV. FILTER sources 60µA, charg-
ing the external capacitor. At time point 7, GATE regulates
to limit the output current to 40mV/RSENSE. If the output
continues to be in analog current limit when the FILTER
pin voltage reaches its threshold (1.253V) at time point
8, the circuit breaker trips and GATE is pulled low. The
device latches-off and ⎯F⎯A⎯U⎯L⎯T is pulled low, indicating a
fault condition. The FILTER capacitor discharges through
a 2.4µA pull-down until the device resets.
Resetting the Electronic Circuit Breaker
When the LTC4216’s electronic circuit breaker is tripped
during a fault condition, ⎯F⎯A⎯U⎯L⎯T is asserted low and the
⎯R⎯E⎯S⎯E⎯T, SS and GATE pins are all pulled to ground. This is
shown in the timing diagram of Figure 11. The LTC4216
remains latched-off until the external fault is cleared. To
clear the internal fault latch and restart the device, pull
the ON pin low (< 0.4V) at time point 4 for at least 100µs,
after which the ⎯F⎯A⎯U⎯L⎯T will go high at time point 5. Tog-
gling the ON pin from low to high (> 0.8V) initiates a new
start-up cycle.
Sense Resistor Considerations
The circuit breaker trip threshold of 25mV and the value of
the sense resistor, RSENSE,connectedbetweentheSENSEP
and SENSEN pins, determine the trip current level as given
by Equation (10). If the fault current level exceeds the
analog current limit, the current is limited to a value given
by Equation (11). Should the overload condition exist for
more than one fault filter delay as given by Equation (2),
the circuit breaker trips and the device is latched-off.
I
V
R
mV
R
TRIP CB
CB TH
SENSE
SENSE
()
()
=
∆
=
25
(10)
I
V
R
mV
R
ACL
ACL TH
SENSE
SENSE
=
∆
=
()
40
(11)
For a new circuit design, the sense resistor value is first
calculated from the maximum operating load current under
normal conditions and the minimum circuit breaker trip
threshold. This is given by:
R
V
I
mV
I
SENSE
CB TH MIN
LOAD MAX
LOAD MAX
=
∆
=
(,
)
()
()
.
21 5
(12)
Figure 10. Power-Up into an Output-Short and
Circuit Breaker Trips
Figure 11. Mild Overcurrent Circuit Breaker Trips Followed by
Device Reset
TIMER
2.4
µA
2
µA
40mV
25mV
10
µA
10
µA
1
µA
12 3
4 5 6 7
8
4216 F10
0.8V
TRACKS SS RAMP
FPD
60
µA
SENSEP-SENSEN
FILTER
SS
GATE
VOUT
ON
FAULT
RESET
VFILT(TH)
VTMR(TH)
VGATE – VOUT < VGS(TH)
FAULT
FILTER
DELAY
GATE
REGULATING
2.4
µA
<40mV
25mV
4216 F11
FPD
60
µA
tRST(ONLO)
VFILT(TH)
SENSEP-SENSEN
FILTER
FAULT
RESET
SS
GATE
VOUT
1
ON
0.4V
POWER BAD
VFB < 0.6V
23
4
5
MILD
OVERCURRENT
FAULT LATCH
RESET
CIRCUIT BREAKER TRIPS
AND LATCHED-OFF
RESET PULLED LOW
DUE TO POWER BAD
APPLICATIO S I FOR ATIO



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