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74FCT16952CTPVG Datasheet(PDF) 2 Page - Integrated Device Technology

Part # 74FCT16952CTPVG
Description  FAST CMOS 16-BIT REGISTERED TRANSCEIVER
PDF  7 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

74FCT16952CTPVG Datasheet(HTML) 2 Page - Integrated Device Technology

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INDUSTRIALTEMPERATURERANGE
IDT74FCT16952AT/CT/ET
FASTCMOS16-BITREGISTEREDTRANSCEIVER
PI N CON FI GU RAT I ON
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
° C
IOUT
DC Output Current
–60 to +120
mA
ABSOLU T E M AX I M U M RAT I N GS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
3.5
6
pF
COUT
Output Capacitance
VOUT = 0V
3.5
8
pF
CAPACI TAN CE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
1
B1
1
B2
GND
1
B3
1
B4
VCC
1
B5
1
B6
1
OEBA
1
B7
1
B8
2
B1
2
B2
GND
2
B3
2
B4
VCC
2
B5
GND
1
CLKBA
2
B7
2
B6
2
B8
GND
2
CLKBA
2
OEBA
1
CLKAB
GND
1
A1
1
A2
VCC
1
A3
1
A4
GND
1
A5
1
A6
1
A7
1
A8
GND
2
A1
2
A2
VCC
2
A3
2
A5
2
A4
2
A7
GND
2
A8
2
CLKAB
2
A6
1
OEAB
1
CEAB
2
OEAB
2
CEAB
2
CEBA
1
CEBA
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
FU N CT I ON TABLE(1,3)
Inputs
Outputs
xCEAB
xCLKAB
xOEAB
xAx
xBx
HX
L
X
B(2)
XL
L
X
B(2)
L
↑
LL
L
L
↑
LH
H
XX
H
X
Z
NOTES:
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA, and
xOEBA.
2. Level of B before the indicated steady-state input conditions were established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
↑ = LOW-to-HIGH Transition
Z = High-impedance
PI N DESCRI PT I ON
Pin Names
Description
xOEAB
A-to-B Output Enable Input (Active LOW)
xOEBA
B-to-A Output Enable Input (Active LOW)
xCEAB
A-to-B Clock Enable Input (Active LOW)
xCEBA
B-to-A Clock Enable Input (Active LOW)
xCLKAB
A-to-B Clock Input
xCLKBA
B-to-A Clock Input
x A x
A-to-B Data Inputs or B-to-A 3-State Outputs
x B x
B-to-A Data Inputs or A-to-B 3-State Outputs
TOP VIEW
Package Type
Package Code
Order Code
TSSOP
PAG56
PAG
SSOP
PVG56
PVG



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