SN8P2740 datasheet(21/136 Pages) SONIX

21 / 136 page

SN8P2740 Series

ADC, OP-amp, Comparator 8-Bit Micro-Controller

SONiX TECHNOLOGY CO., LTD

Page 21

Version 2.0

2.2 DATA MEMORY (RAM)



128 X 8-bit RAM

Address

RAM Location

BANK 0

000h

General Purpose Area

RAM Bank 0

“

07Fh

080h

System Register

080h~0FFh of Bank 0 store system

registers (128 bytes).

“

0FFh

End of Bank 0

The 128-byte general purpose RAM is in Bank 0. Sonix provides

“Bank 0” type instructions (e.g. b0mov, b0add, b0bts1,

b0bset

…) to control Bank 0 RAM in non-zero RAM bank condition directly.

2.2.1 SYSTEM REGISTER

2.2.1.1

SYSTEM REGISTER TABLE

PFLAG

CMDB0 CMDB1 CM0M

CM1M

CM2M

OPM

P4CON

ADM

ADB

ADR

ADT

P0M

PEDGE

C P1W

P1M

P4M

INTRQ

INTEN

OSCM

WDTR

TC0R

PCL

PCH

T0M

T0C

TC0M

TC0C

BZM

STKP

E P0UR

P1UR

P4UR

@HL

@YZ

TC0D

F STK7L STK7H

STK6L

STK6H STK5L STK5H

STK4L

STK4H

STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H

2.2.1.2

SYSTEM REGISTER DESCRIPTION

H, L = Working, @HL addressing register.

Y, Z = Working, @YZ and ROM addressing register.

R = Working register and ROM look-up data buffer.

PFLAG = Special flag register.

CMDB0 = Comparator output de-bounce control register 0.

CMDB1 = Comparator output de-bounce control register 1.

CM0M = Comparator 0 mode register.

CM1M = Comparator 1 mode register.

CM2M = Comparator 2 mode register.

OPM = OP amp 0~2 mode register.

P4CON = P4 configuration register.

ADM = ADC mode register.

ADB = ADC data buffer.

ADR = ADC resolution select register.

ADT = ADC offset calibration register.

PEDGE = P0.0, P0.1, P0.2 edge direction register.

INTRQ = Interrupt request register.

INTEN = Interrupt enable register.

OSCM = Oscillator mode register.

WDTR = Watchdog timer clear register.

PnM = Port n input/output mode register.

Pn = Port n data buffer.

PnUR = Port n pull-up resister control register.

PCH, PCL = Program counter.

T0M = T0 mode register.

T0C = T0 counting register.

TC0M = TC0 mode register.

TC0C = TC0 counting register.

TC0R = TC0 auto-reload data buffer.

TC0D = TC0 duty control register.

BZM = 2K/4K buzzer mode register.

@HL = RAM HL indirect addressing index pointer.

@YZ = RAM YZ indirect addressing index pointer.

STKP = Stack pointer buffer.

STK0~STK7 = Stack 0 ~ stack 7 buffer.

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