LD7576GS datasheet(15/22 Pages) LEADTREND

15 / 22 page

LD7576/76H/76J/76K

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7576-DS-04a

December 2009

of the equivalent short-circuit induced by such latchup

behavior.

Leadtrend’s proprietary of Hi-V technology eliminate

parasitic SCR in LD7576X series.

Figure 24 shows the

equivalent circuit of LD7576X series of Hi-V structure.

Accordingly, LD7576X series is more capable to sustain

negative voltage than other similar products. Nevertheless,

a 40K

Ω resistor is recommended to be added on the Hi-V

path to play as a current limit resistor whenever a negative

voltage is applied.

Fig. 23

Fig. 24

Frequency Trembling

The LD7576X series are built in with adjustable frequency

trembling function, which provides the power supply

designers to optimize EMI performance and system cost.

The Trembling frequency was internally set for

±4KHz

when incorporating with 65KHz switching frequency.

the other hand, the modulating frequency can be set by

adjusting the capacitance value on the CT pin. The best

value for the CT capacitance is from 0.047

μF to 0.1μF,

typically generating modulating frequency of 200Hz

~100Hz. It is a tradeoff to select proper CT value between

the EMI performance and OLP delay time.

In theory,

higher CT value will accompany with longer OLP delay

time.

It is strongly recommended to use higher quality capacitor

(low temperature coefficient and low initial tolerance) like

X7R type ceramic capacitor to avoid the variation on the

EMI performance under different temperature conditions.

As show in figure 25, short layout loop from CT to GND is

prefer to prevent any unexpected parasitic effect or

coupling noises.

And beware not to connect any extra

loading to CT pin except of the capacitor to minimize the

affect on modulating frequency.

Fig. 25

On-Chip OTP

internal

OTP

circuit

embedded

inside

the

LD7576/76J to provide the worst-case protection for this

controller. When the chip temperature rises higher than

the trip OTP level, the output will be disabled until the chip

is cooled down below the hysteresis window

On-Chip OTP – Latch - Mode

Similar with the behaviors like OLP and OVP on Vcc

latch-mode, an internal OTP circuit is embedded within

the LD7576H/76K to provide the worst-case protection for

this controller. When the chip temperature rises higher

than the trip OTP level, it shuts down the output gate drive

circuit simultaneously to latch off the switching of the

power MOSFET. It won’t recover unless the chip is cooled

down below the OTP threshold and recycle again.

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