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MA5620D3 Datasheet(PDF) 2 Page - Major-Power Technology Co., LTD. |
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MA5620D3 Datasheet(HTML) 2 Page - Major-Power Technology Co., LTD. |
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2 / 8 page ![]() 2/8 MA5620(Preliminary) Major Power Technology Co., Ltd. Rev.0.2 Jul 16, 2016 PIN ASSIGNMENT The package of MA5620 is TDFN-12L (3x3) package; the pin assignment is given by: 1 2 3 4 5 6 12 11 10 9 8 7 (GND ) GND VREF CS2 CS1 COMP FB GL LX GH VIN SENSE BS (Top View) TDFN-12L (3 x 3) SOP-14L 1 (Top View) LX SGND PGND GL FB COMP CS1 CS2 VREF SGND BS VIN GH SENSE 2 3 4 5 6 7 8 9 10 11 12 13 14 Name Description BS Boot-Strap Pin. Supply high side gate driver. Decouple this pin to LX pin with 0.1uF ceramic cap. SENSE Power Input Current limit sense. VIN Power Input pin. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. GH Gate drive for external high side N-MOSFET.. LX Switching sense. GL Gate drive for external low side N-MOSFET.. PGND/ GND Power Ground. FB Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a resistive voltage divider from the output voltage. COMP Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND to compensate the regulation control loop. CS1 The Current Sense 1 pin. CS2 The Current Sense 2 pin. VREF Internal regulator pin PGND Ground. PAD Ground (Connect to GND). |
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