M65818AFP

Rev.1.00, Sep.04.2003, page 11 of 38

5.2. SCDT, SCSHIFT, SCLATCH

38 37 36

SCDT,SCSHIFT,and SCLATCH are input pins for setting M65818AFP's operation.

Input format of SCDT, SCSHIFT and SCLATCH is shown below.

• Input format of SCDT, SCSHIFT, and SCLATCH.

bit1

SCDT

SCSHIFT

SCLATCH

1

5

10

15

20

24

• Mode Setting

The operating Mode are classified in four and assigned by bit1and bit2. These four functions are shown below.

(bit1 and bit2 ) = ( "L" and "L" ) Gain control mode: Gain control.

(bit1 and bit2 ) = ( "L "and "H" ) System1 Mode: Primary block initialization, etc.

(bit1 and bit2 ) = ( "H" and "L" ) System2 Mode : Secondary block initialization, etc.

(bit1 and bit2 ) = ( "H" and "H" ) Test mode ( setting prohibition )

Refer to Chapter 6 about these four setting in detail.

5.3. DATA, BCK, LRCK

43 44 45

DATA, BCK and LRCK are input pins under condition of `Normal ` mode.

Input formats are supported by following 4 ways, and are set by Serial Control, "System1 Mode, bit3 and bit4".

Input data length are selectable in the case of "MSB First Right Justified"

(Serial Control "System1 Mode, bit5, 6").

and Input Signal Sampling Rate(1/2/4fsi) are set by Serial Control,"System1 Mode, bit7,8"

Input formats are shown in following figures.