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EM5305VT Datasheet(PDF) 5 Page - Excelliance MOS Corp.

Part # EM5305VT
Description  12V Synchronous Buck controller
PDF  12 Pages
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Manufacturer  EXCELLIANCE [Excelliance MOS Corp.]
Direct Link  http://www.excelliancemos.com/
Logo EXCELLIANCE - Excelliance MOS Corp.

EM5305VT Datasheet(HTML) 5 Page - Excelliance MOS Corp.

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2013/7/11
A.2
5
EM5305
Internal Oscillator
Free Running Frequency
fOSC
270
300
330
kHz
Ramp Amplitude
△VOSC
1.5
Vp-p
Max. Duty Cycle
DMAX
80
85
90
%
Error Amplifier
Trans-conductance
Gm
700
uA/V
Max. Comp Source Current
100
200
uA
Max. Comp Sink Current
100
200
uA
PWM Controller Gate Drivers
Upper Gate Sourcing Current
IUG_SRC
VBOOT - VPHASE = 12V,
VBOOT - VUGATE = 6V
1.2
A
Upper Gate RDS(ON) Sinking
RUG_SNK
VBOOT - VPHASE = 12V,
VUGATE – VPHASE = 0.1V
3
Ω
Lower Gate Sourcing Current
ILG_SRC
VCC – VLGATE = 6V
1.2
A
Lower Gate RDS(ON) Sinking
RLG_SNK VLGATE = 0.1V
1.8
Ω
PHASE Falling to LGATE Rising
Delay
VCC = 12V; (VUGATE - VPHASE)< 1.2V
to VLGATE > 1.2V
30
90
ns
LGATE Falling to UGATE Rising
Delay
VCC = 12V; VLGATE < 1.2V to
(VUGATE - VPHASE) > 1.2V
30
90
ns
Reference Voltage
Feedback Voltage
VFB
VOFS= 0.8V
0.792
0.8
0.808
V
Reference Output
VREFOUT
0.792
0.8
0.808
V
Reference Output Source/Sink
IREFOUT
5
mA
Protection section
FB Under Voltage Protection
VFB_UVP FB falling
50
60
70
%
UVP delay time
7.5
10
us
FB Over Voltage Protection
VFB_OVP FB rising
120
130
140
%
OVP delay time
7.5
10
us
LGATE OC Setting Current
IOCSET
8.5
10
11.5
uA
Built in Max. OCP Threshold
-630
mV
Soft-Start Interval
TSS
1
2
3
ms
COMP Shutdown Threshold
VCOMP/
SD#
0.4
V
POK Threshold
VPOK
88
90
92
%
POK Delay
1
2
3
ms
Power Good Leakage Current
1
uA
Temperature Shutdown
TSD
140
℃
Temperature Shutdown
Hysteresis
TSD_Hys
40
℃
Note 1.
Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2.
θJA PSOP-8 packages is 52°C /W on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm
2
copper area.
Note 3.
Devices are ESD sensitive. Handling precaution is recommended.
Note 4.
The device is not guaranteed to function outside its operating conditions.



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