APPLICATION NOTES

HEAT SINKING

Refer to the following thermal model and governing equa-

tions to determine appropriate heat sinking for your application.

Example:

This example demonstrates a worst case analysis for the op-

amp output stage. This occurs when the output voltage is 1/2

the power supply voltage. Under this condition, maximum power

transfer occurs and the output is under maximum stress.

Conditions:

Governing Equation:

Where

For a worst case analysis we will treat the +8Vp sine wave

as an 8 VDC output voltage.

1.) Find Driver Power Dissipation

= (16V-8V) (8V/100Ω)

= .64W

= ((125°C - 90°C) / .64W) - 37°C/W - .15°C/W

= 54.7 - 37.15

= 17.54°C/W

The heat sink in this example must have a thermal resistance

of no more than 17.54°C/W to maintain a junction temperature

of no more than +125°C.

OFFSET NULL

Typically, the MSK 3554(B) has an input offset voltage of

less than ±0.5mV. If it is desirable to adjust the offset closer

to "zero", or to a value other than "zero", the circuit below is

recommended. Rp should be a ten-turn 20KΩ potentiometer.

Typical offset adjust is ±20mV.

Thermal Model:

GAIN

-1

-10

-100

follower

Rfb

5.6KΩ

5.6KΩ

10KΩ

0Ω

Cfb

2.0pF

1.2pF

0.0pF

0pF

Ccomp

10pF

10pF

0.0pF

12pF

Rin

5.6KΩ

560Ω

100Ω

0Ω

COMPONENT SELECTION TABLE

COMPENSATION

The compensation capacitor is connected between pins 1

and 3 and is used to optimize bandwidth and slew rate while

maintaining circuit stability. The effect of compensation ca-

pacitance can be seen in the Bode Plot under the Typical Perfor-

mance Curves. As closed loop gain increases, compensation

capacitance can decrease and higher slew rates and wider band-

widths will be realized. See the component selection table for

recommended values of input and feedback resistance as well

as feedback capacitance and compensation capacitance.

3

Rev. B 7/00