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Confidential

SiFirst_DS_5897_V1.0

SF5897

Pin Configuration

HV

FB

1

2

3

CS

DEM

PFCVCC

VDD

4

8

7

6

5

GND

GATE

SOP8

Ordering Information

Part Number

Top Mark

Package

Tape & Reel

SF5897SG

SF5897SG

SOP8

Green

SF5897SGT

SF5897SG

SOP8

Green

Yes

Marking Information

S F 5 8 9 7 S G

Y WW

YWW: Year&Week code

Pin Description

Pin Num

Pin Name

I/O

Description

1

HV

P

This pin connects to bulk capacitor for high voltage startup.

2

FB

I

Voltage feedback pin. The loop regulation is achieved by connecting a

photo-coupler to this pin. PWM duty cycle is generated by this pin voltage

and the current sense signal at Pin 3.

3

CS

I

Current sense input pin.

4

GND

P

IC ground pin.

5

GATE

O

Totem-pole gate driver output to drive the external MOSFET.

6

VDD

P

IC power supply pin.

7

PFCVDD

O

Power supply output for PFC Controller.

8

DEM

I

Transformer core demagnetization detection pin. This pin is also used for

output over voltage protection (OVP).