CD4070B datasheet(4/5 Pages) SS

4 / 5 page

CMOS High Voltage Logic – CD4070B

Rev 1.0

19/09/18

LIMITS

PARAMETER

5. Not production tested in die form, characterized by chip design and tested in package.

AC Electrical Characteristics5

SYMBOL

VDD

CONDITIONS

UNITS

FULL RANGE

25°C

85°C

VIN = VDD or VSS

VOL = 0.4V

0.64

0.51

0.36

10V

VIN = VDD or VSS

VOL = 0.5V

1.6

1.3

0.9

Minimum Output

Low (Sink) Current

IOL

15V

VIN = VDD or VSS

VOL = 1.5V

4.2

3.4

2.4

VIN = VDD or VSS

VOH = 2.5V

-3.0

-2.4

-1.7

VIN = VDD or VSS

VOH = 4.6V

-0.64

-0.51

-0.36

10V

VIN = VDD or VSS

VOH = 9.5V

-1.6

-1.3

-0.9

Minimum Output

High (Source)

Current

IOH

15V

VIN = VDD or VSS

VOH = 13.5V

-4.2

-3.4

-2.4

DC Electrical Characteristics Continued (Voltages referenced to V

SS)

TYPICAL

4. . −55˚C ≤ TJ ≤ +125˚C

LIMITS

PARAMETER

SYMBOL

VDD

CONDITIONS

UNITS

FULL RANGE

25°C

85°C

125

250

500

10V

120

240

Propagation Delay,

CL = 50pF,

Input A or B to

Output Y (Figure 1)

tPLH, tPHL

15V

RL = 200kΩ

tr = tf = 20ns

180

100

200

400

10V

100

200

Output Transition

CL = 50pF,

Time, Any Output

(Figure 1)

tTLH, tTHL

15V

RL = 200kΩ

tr = tf = 20ns

160

CL = 50pF,

Input Capacitance

CIN

RL = 200kΩ

tr = tf = 20ns

7.5

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