High Speed CMOS Logic – 54HC139

Dual 1-of-4 Decoder / Demultiplexer in bare die form

Rev 1.0

16/04/18

Features:

 

 

Output Drive Capability: 10 LSTTL Loads

 

 

 

 

The 54HC139 is fabricated using a 2.5µm 5V CMOS

process and has the same high speed performance of

LSTTL combined with CMOS low power consumption. This

device consists of x2 independent 1–of–4 decoders, each

decoding a 2 bit address to 1–of–4 active–low outputs.

Active–low Selects facilitate the demultiplexing and

cascading functions. The demultiplexing function is

executed by using the Address inputs to select the desired

device output and utilizing the Select as a data input.

Low Input Current: 1µA

Outputs directly interface CMOS, NMOS and TTL

Operating Voltage Range: 2V to 6V

CMOS High Noise Immunity

Function compatible with 54LS139

Full Military Temperature Range.

 

 

 

Ordering Information

Description

Die Dimensions in µm (mils)

The following part suffixes apply:

1300 (51)

 

 

 

No suffix - MIL-STD-883 /2010B Visual Inspection

“H” - MIL-STD-883 /2010B Visual Inspection

+ MIL-PRF-38534 Class H LAT

 

“K” - MIL-STD-883 /2010A Visual Inspection (Space)

+ MIL-PRF-38534 Class K LAT

 

LAT = Lot Acceptance Test.

 

For further information on LAT process flows see below.

 

www.siliconsupplies.com\quality\bare-die-lot-qualification

 

 

Die Size (Unsawn)

1300 x 1400

 

 

 

 

51 x 55

µm

mils

Minimum Bond Pad Size

106 x 106

Supply Formats:

Mechanical Specification

Default – Die in Waffle Pack (400 per tray capacity)

Sawn Wafer on Tape – On request

Unsawn Wafer – On request

Die Thickness <> 350µm(14 Mils) – On request

Assembled into Ceramic Package – On request

4.17 x 4.17

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

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