Electronic Components Datasheet Search
  English  ▼

X  

MSFS Datasheet(PDF) 3 Page - Mixed Signal Integration

Part # MSFS
Description  Selectable Lowpass/Bandpass Filter
PDF  8 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MSI [Mixed Signal Integration]
Direct Link  https://www.mix-sig.com
Logo MSI - Mixed Signal Integration

MSFS Datasheet(HTML) 3 Page - Mixed Signal Integration

  MSFS Datasheet HTML 1Page - Mixed Signal Integration MSFS Datasheet HTML 2Page - Mixed Signal Integration MSFS Datasheet HTML 3Page - Mixed Signal Integration MSFS Datasheet HTML 4Page - Mixed Signal Integration MSFS Datasheet HTML 5Page - Mixed Signal Integration MSFS Datasheet HTML 6Page - Mixed Signal Integration MSFS Datasheet HTML 7Page - Mixed Signal Integration MSFS Datasheet HTML 8Page - Mixed Signal Integration  
Zoom Inzoom in Zoom Outzoom out
 3 / 8 page
background image
TYPE
Lowpass
Bandpass
0
Butterworth
Full Octave
1
Bessel
Third Octave
2
Elliptic
Sixth Octave
The filter type is selected using the two filter select pins,
TYPE and FSEL, FSEL is a CMOS level pin that selects
lowpass or bandpass (lowpass = 0, bandpass = 1). TYPE
Is a tertiary control pin that selects the filter response.
State 0 is VSS, state 1 is GND and state 2 is VDD.
Selectable Lowpass/Bandpass Filter
Data Sheet
03/2001
Pin Description________________
1. TYPE
Filter Response Select Pin.
2. S2
Input Multiiplexor Select Pin
3. CLK
Clock Input
4. G
Gain Select Pin
5. VDD
Positive Power Supply, Typically 2.5
Volts for Split Supply 5.0 Volts for
Single SuppLy
6. PD
Power Down Pin, CMOS level,
Hi = Power Down
7, VSS
Negative Power Supply, Typically -2.5
Volts for Split Supply. 0 Volts for Single
Supply
8. F0
Clock to Corner Select Pin
9. GND
GND Pin, OV for Split Supplies
2.5 Volts Typical for Single Supply
10. IN1
Input 1, Select Code 00
11. IN2
Input 2, Select Code 01
12. IN3
Input 3, Select Code 10
13. IN4
Input 4, Select Code 11
14. FSEL
Selects Filter.
O = Low Pass, 1 = Bandpass
15. Out
Filter Output
16. S1
Input Multiplexor Select Pin
Pin Configuration
Filter Selection________________
Gain and Frequency Selection____
The Gain control pin G is a tertiary control pin where
state 0 is VSS, state 1 is GND level and state 2 is VDD.
G
Gain
0
OdB
1
10dB
2
20dB
The frequency control pin F0 is a CMOS level pin where
high is clock to corner of 100 to 1 (200 to 1 for Bessel)
and low is clock to corner of 50 to 1 (100 to 1 for Bessel).
FSEL
IN
OUT
GND
TYPE
VSS
CLK
5
VDD
16
15
14
13
12
11
10
9
TYPE
S1
S2
OUT
CLK
FSEL
G
IN4
VDD
IN3
PD
IN2
VSS
IN1
F0
GND
8 Pin
16 Pin
Web Site “www.mix-sig.com”
© 2001 Mixed Signal Integration 3



Html Pages

1 2 3 4 5 6 7 8


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com