2005 Feb 01

13

Philips Semiconductors

Product specification

Single D-type flip-flop with set and

reset; positive edge trigger

74LVC1G74

handbook, full pagewidth

MNB142

trem

tPHL

tPHL

tW

tPLH

tPLH

VM

VM

VM

tW

VM

VM

VI

GND

VI

GND

SD input

VI

GND

RD input

CP input

VOH

VOL

Q output

VOH

VOL

Q output

Fig.7

The set (SD) and reset (RD) input to output (Q, Q) propagation delays, the set and reset pulse widths and

the RD to CP removal time.

INPUT

1.65 V to 1.95 V

0.5

≤ 2.0 ns

2.3 V to 2.7 V

0.5

≤ 2.0 ns

2.7 V

1.5 V

2.7 V

≤ 2.5 ns

3.0 V to 3.6 V

1.5 V

2.7 V

≤ 2.5 ns

4.5 V to 5.5 V

0.5

≤ 2.5 ns