HD151BF854 datasheet(9/13 Pages) RENESAS

Part #	HD151BF854

Description	2.5 V PLL Clock Buffer for DDR Application

PDF	13 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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9 / 13 page

HD151BF854

Rev.4, Jan. 2003, page 7 of 11

Electrical Characteristics

Item

Symbol

Min

Typ *

Max

Unit

Test Conditions

Input clamp voltage

(All inputs)

VIK

—

–1.2

II = –18 mA, VDD = 2.3 V

VDD–0.2

——

IOH = –100 µA, VDD = 2.3 to 2.7

VOH

1.7

—

VDD

IOH = –12 mA, VDD = 2.3 V

——

0.2

IOL = 100 µA, VDD = 2.3 to 2.7 V

Output voltage

VOL

——

0.6

IOL = 12 mA, VDD = 2.3 V

Input current

–10

—

µA

VI = 0 V or 2.7 V,

VDD = 2.7 V, CLKIN, FBIN

Analog supply current

AICC

—

VDD = AVDD = 2.7 V,

170 MHz

Dynamic supply current

DICC

—

250

300

VDD = AVDD = 2.7 V,

170 MHz

All Yn,

Yn, = open

Input capacitance*

2.5

—

3.5

Delta input capacitance*

CDi

–0.25

—

0.25

CLKIN and FBIN

Notes: 1. For conditions shown as Min or Max, use the appropriate value specified under recommended

operating conditions.

2. Target of design, not 100% tested in production.

HD151BF854 Datasheet(PDF) 9 Page - Renesas Technology Corp

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