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GPR26L080A Datasheet(PDF) 13 Page - Generalplus Technology Inc.

Part # GPR26L080A
Description  8M-BIT Low Voltage, Serial Mask ROM with 50MHz SPI Bus Interface
PDF  17 Pages
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Manufacturer  GENERALPLUS [Generalplus Technology Inc.]
Direct Link  http://www.generalplus.com
Logo GENERALPLUS - Generalplus Technology Inc.

GPR26L080A Datasheet(HTML) 13 Page - Generalplus Technology Inc.

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GPR26L080A
© Generalplus Technology Inc.
Proprietary & Confidential
13
AUG. 13, 2009
Version: 1.3
Table7. Capacitance
Symbol
Parameter
Test Condition
Min.
Max.
Unit
COUT
Output Capacitance (Q)
VOUT = 0V
-
8
pF
CIN
Input Capacitance (other pins)
VIN = 0V
-
6
pF
Note:
Sampled only, not 100% tested, at TA=25°C and a frequency of 20 MHz.
Table8. DC Characteristics
Symbol
Parameter
Test Condition (in addition to those in Table 8)
Min.
Max.
Unit
ILI
Input Leakage Current
-
± 2
uA
ILO
Output Leakage Current
-
± 2
uA
ICC1
Standby Current
SB = VCC, VIN = VSS or VCC
-
15
uA
C = 0.1VCC / 0.9.VCC at 50MHz, Q = open
-
8
mA
ICC2
Operating Current (READ)
C = 0.1VCC / 0.9.VCC at 20MHz, Q = open
-
4
mA
VIL
Input Low Voltage
- 0.5
0.3VCC
V
VIH
Input High Voltage
0.7VCC
VCC+0.4
V
VOL
Output Low Voltage
IOL = 1.6mA
-
0.4
V
VOH
Output High Voltage
IOH = -100uA
VCC- 0.2
-
V
Note:
Once SB is low, the device will be enabled with current consumption ICC2 regardless of whether or not C (serial clock) is toggled.
Table9. AC Characteristics
Test conditions specified in Table 4 and Table 5
Symbol
Alt.
Parameter
Min.
Typ.
Max.
Unit
fC
fC
Clock
Frequency
for
the
following
instructions:
FAST_READ
D.C.
-
50
MHz
fR
Clock Frequency for READ instructions
D.C.
-
20
MHz
tCH
1
tCLH
Clock High Time
9
-
-
ns
tCL
1
tCLL
Clock Low Time
9
-
-
ns
tCLCH
2
Clock Rise Time3 (peak to peak)
0.1
-
-
V/ns
tCHCL
2
Clock Fall Time3 (peak to peak)
0.1
-
-
V/ns
tSLCH
tCSS
SB Active Setup Time (relative to C)
5
-
-
ns
tCHSL
SB Not Active Hold Time (relative to C)
5
-
-
ns
tDVCH
tDSU
Data In Setup Time
2
-
-
ns
tCHDX
tDH
Data In Hold Time
5
-
-
ns
tCHSH
SB Active Hold Time (relative to C)
5
-
-
ns
tSHCH
SB Not Active Setup Time (relative to C)
5
-
-
ns
tSHSL
tCSH
SB Deselect Time
100
-
-
ns
tSHQZ
2
tDIS
Output Disable Time
-
-
8
ns
tCLQV
tV
Clock Low to Output Valid
-
-
8
ns
tCLQX
tHO
Output Hold Time
0
-
-
ns
tHLCH
HOLDB Setup Time (relative to C)
5
-
-
ns
tCHHH
HOLDB Hold Time (relative to C)
5
-
-
ns
tHHCH
HOLD Setup Time (relative to C)
5
-
-
ns
tCHHL
HOLD Hold Time (relative to C)
5
-
-
ns
tHHQX
2
tLZ
HOLD to Output Low-Z
-
-
8
ns
tHLQZ
2
tHZ
HOLDB to Output High-Z
-
-
8
ns
Note1:
tCH + tCL must be greater than or equal to 1/ fC
Note2:
Value guaranteed by characterization, not 100% tested in production.
Note3:
Expressed as a slew-rate.



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