AW9656 datasheet(13/18 Pages) AWINIC

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AW9656

March 2018 V1.1

www.awinic.com.cn

OUT

≈

For a white LED with the forward voltage of 3.2V

(25mA), the power efficiency is 53.5% approxi-

mately when the input voltage is 3.0V.

Power dissipation

The maximum power dissipation inside the AW9656

can be calculated based on the following equation:

OUT

Dmax

)

VIN

(

The maximum power dissipation occurs when the

input voltage is up to the VB (the mode transition

voltage from 1X to 2X). This need to be lower than

the maximum allowed power dissipation of the

package, which can be calculated by using the fol-

lowing equation:

θja

Jmax

package

Dmax,

PCB Layout Consideration

The AW9656 is a high-frequency charge pump

converter. Careful PCB layout routing is necessary

to achieve a good and efficient operating of the de-

vice and fully exploit its performance. The following

guidelines should be strictly followed for the layout

of the AW9656:

Place all peripheral components as close to the

device as possible. Place CIN, COUT, Cflying and

RISET close to the VIN, VOUT C+, C- and the

ISET pin respectively. The connection between

the pins and the component pads should be

copper traces without any through-hole via

connection.

The VIN traces should be wide enough to min-

imize parasitic inductance and parasitic re-

sistance. The trace running from the battery to

the device should be place carefully and

shielded strictly.

The CIN, COUT and Cflying must be place close the

device and the traces running from the capacitor

pads to the pins should be as wide and short as

possible to reduce the noise and EMI.

The exposed pad, PGND and GND must be

soldered to a large ground plane for heat sink-

ing and noise prevention. The through-hole vias

located at the exposed pad is connected to the

ground plane of the internal layer.

The recommended PCB layout of the AW9656 is

shown in Figure 11.

Figure 11 Recommended PCB layout of the AW9656

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