AM5728 datasheet(256/415 Pages) TI1

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gpmc_clk

gpmc_csi

gpmc_a[2 :1]

gpmc_

ben

gpmc_ben0

gpmc_

_ale

advn

gpmc_wen

gpmc_ad[15:0]

gpmc_waitj

Address

D 0

D 1

D 2

D 3

F15

F17

F18

F20

F14

F22

F21

GPMC_06

gpio6_16.clkout1

F23

256

AM5729, AM5728, AM5726

SPRS953F – DECEMBER 2015 – REVISED MAY 2019

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Timing Requirements and Switching Characteristics

Figure 7-12. GPMC / Nonmultiplexed 16bits NOR Flash - Synchronous Burst Write 4x16bits -

(GpmcFCLKDivider = 0)(1)(2)

(1) In gpmc_csi, i = 1 to 7.

(2) In gpmc_waitj, j = 0 to 1.

7.10.2 GPMC/NOR Flash Interface Asynchronous Timing

CAUTION

The IO Timings provided in this section are only valid for some GPMC usage

modes when the corresponding Virtual IO Timings or Manual IO Timings are

configured as described in the tables found in this section.

Table 7-29 and Table 7-30 assume testing over the recommended operating conditions and electrical

characteristic conditions below (see Figure 7-13, Figure 7-14, Figure 7-15, Figure 7-16, Figure 7-17, and

Figure 7-18).

Table 7-29. GPMC/NOR Flash Interface Timing Requirements - Asynchronous Mode

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

FA5

tacc(DAT)

Data Maximum Access Time (GPMC_FCLK cycles)

H (1)

cycles

AM5728 Datasheet(PDF) 256 Page - Texas Instruments

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