IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

IXTA05N100P

IXTP05N100P

Fig. 7. Input Admittance

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

25

- 40

Fig. 8. Transconductance

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0

0.1

0.20.3

0.40.5

0.60.7

0.8

125

25

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

0.4

0.5

0.6

0.7

0.8

0.9

Fig. 10. Gate Charge

0

1

2

3

4

5

6

7

8

9

10

0

1

234

5

6789

Fig. 11. Capacitance

1

10

100

1,000

0

5

10

15

20

25

30

35

40

f = 1 MHz

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

0.01

0.1

1

10

10

100

1000

Single Pulse

1ms

10ms

DC

100μs