XRT59L91

9

Rev. P2.00

Preliminary

TClk

TxP O S

TxNE G

tS U

tHO

Figure 2. Illustration on how the XRT59L91 Device Samples the data on the

TXPOS and TXNEG input pins

In general, if the XRT59L91 device samples a “1” on the

TxPOS input pin, then the “Transmit Section” of the

device will ultimately generate a positive polarity pulse

via the TTIP and TRing output pins (across a 1:2

transformer). Conversely, if the XRT59L91 device

samples a “1” on the “TxNEG” input pin, then the

“Transmit Section” of the device will ultimately generate

a negative polarity pulse via the TTIP and TRing output

pins (across a 1:2 transformer).

1.2.1 Operating the Transmitter in the

“Clockless” Mode

The user can configure the XRT59L91 device to oper-

ate in the “Clockless” mode by doing the following:

l

Not applying a clock signal to the TXClk input,

and either pulling this pin to VDD or letting it float.

l

By applying RZ (Return to Zero) data to the

TxPOS and TxNEG input pins, as illustrated

below.

TxPO S

TxN E G

TxC lk

D a ta

1

1

0

1

1

0

1

Bit

Pe rio d

RZ P u lse wid th

should conform to

G .703 T e m p la te

N o pulse is to be applie d

in the se cond half of th e

bit perio d

N o A ctivity in

TxC lk L in e

Figure 3. IIlustration on how the Terminal Equipment should apply data to the “Transmit Sec-

tion” of the XRT59L91 Device, when operating in the “Clockless” Mode