16

All data sheets are subject to change without notice

©2005 Maxwell Technologies

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16-Bit Latchup Protected Analog to Digital Converter

7809LP

01.11.05 Rev 7

Dedicated digital outputs are not similarly protected since in most applications there will be no appreciable drive signal

on these outputs to back-drive the pins. Pull up resistors on these outputs should be 10 K

back-drive current. Low on resistance, transmission gate circuits are also connected between the package pins and

the die REF and CAP pins. These gates minimize the transient loading on the external filter capacitors required on

After the functional recovery time, data conversions occur with a degraded accuracy until the full accuracy recovery

time.

A summary of the pin differences between the ADS7809 and the 7809LP is provided in the table below.

ADS7809

7809LPRP

1-10

Various

Various

Equivalent function to ADS7809 pins 1-10 respectively. Timing specifications

change slightly (0 - 10 ns) for the 7809LPRP due to the latchup protection circuitry

on ADS7809 die inputs.

15-22

Various

Various

Equivalent function to ADS7809 pins 11-18 respectively. Timing specifications

change slightly (0 - 10 ns) for the 7809LPRP due to the latchup protection circuitry

on ADS7809 die inputs.

11

--

LPBIT

A built in test function of latchup protection. A TTL high level pulse for > 5 microsec-

onds duration on this input will trigger latchup protection of the device. This input

shall be low during normal operation.

12

--

LPSTATUS

Latchup protection status output. This TTL level output is low during normal opera-

tion and goes high during a 10 µ s decision time period prior to power being

removed. If the latch up current does not last at least 10 µ s then LPTSTATUS will

go low (inactive) after the 10 µ s decision period without power being removed.

When latchup protection is triggered, this output will go high for the duration of the

time that power is removed from the protected device (50 µ s). All output except

LPSTATUS are invalid during the time that power is removed from the ADS7809

die. This output foes low within 1 us of the power being re-applied to the protected

device. Functional operation of the device is within ~25 µ s after the LPSTATUS

output returns low with degraded accuracy due to the latchup filter circuitry. Full

accuracy is restored ~5 ms later. This output can be used to inform the system pro-

cessor of the latchup protection trigger and the subsequent degraded accuracy in

the 7809LPRP output data. Output pull-up resistors should be 10k

outputs. I/O pins must not be driven high while this signal is active.

13

VANA

VANA

Equivalent function to ADS7809 pin 19. Analog Supply Input.

14

VDIG

VDIG

Equivalent function to ADS7809 pin 20. Digital Supply Input.

23

--

LPVANA

Latchup protected analog supply pin to the ADS7809 die. Decouple to analog

ground with 0.1 µ F ceramic capacitor. Do not exceed 0.2 µ F. Do not connect to

VDIG and/or VANA.

24

--

LPVDIG

Latchup protected digital supply pin to the ADS7809 die. Decouple to digital ground

with 0.1 µ F ceramic capacitor. Do not exceed 0.2 µ F. Do not connect to VDIG and/

or VANA.